Wiring structures, methods of forming the same, and semiconductor devices including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHyunseok Lim, Minhyuk Cho, Kyung-Eun Byun, Hyeonjin Shin, Kaoru Yamamoto, Jungsoo Yoon, Soyoung Lee, Geuno Jeong
Life of this patent
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Abstract
A wiring structure includes a first conductive pattern including doped polysilicon on a substrate, an ohmic contact pattern including a metal silicide on the first conductive pattern, an oxidation prevention pattern including a metal silicon nitride on the ohmic contact pattern, a diffusion barrier including graphene on the oxidation prevention pattern, and a second conductive pattern including a metal on the diffusion barrier.
Claims20
A wiring structure, comprising:
- a first conductive pattern on a substrate, the first conductive pattern including doped polysilicon;
- an ohmic contact pattern on the first conductive pattern, the ohmic contact pattern including a metal silicide;
- an oxidation prevention pattern on the ohmic contact pattern, the oxidation prevention pattern including a metal silicon nitride;
- a diffusion barrier on the oxidation prevention pattern, the diffusion barrier including graphene;
- and
- a second conductive pattern on the diffusion barrier, the second conductive pattern including a metal,
- wherein the first conductive pattern, the ohmic contact pattern, the oxidation prevention pattern, the diffusion barrier, and the second conductive pattern are sequentially stacked in the stated order on the substrate.
A wiring structure, comprising:
- a first conductive pattern on a substrate, the first conductive pattern including doped polysilicon;
- an ohmic contact pattern on the first conductive pattern, the ohmic contact pattern including a metal silicide;
- a diffusion barrier on the ohmic contact pattern, the diffusion barrier including graphene;
- an oxidation prevention pattern on the diffusion barrier, the oxidation prevention pattern including a metal nitride;
- and
- a second conductive pattern on the oxidation prevention pattern, the second conductive pattern including a metal,
- wherein the first conductive pattern, the ohmic contact pattern, the diffusion barrier, the oxidation prevention pattern, and the second conductive pattern are sequentially stacked in the stated order on the substrate.
A semiconductor device, comprising:
- an active pattern on a substrate;
- a gate structure buried at an upper portion of the active pattern;
- a bit line structure on the active pattern;
- a contact plug structure on a portion of the active pattern adjacent to the bit line structure;
- and
- a capacitor on the contact plug structure,
- wherein the bit line structure includes:
- a first conductive pattern including doped polysilicon;
- a first ohmic contact pattern on the first conductive pattern, the first ohmic contact pattern including a metal silicide;
- a first oxidation prevention pattern on the first ohmic contact pattern, the first oxidation prevention pattern including a metal silicon nitride;
- a first diffusion barrier on the first oxidation prevention pattern, the first diffusion barrier including graphene;
- and
- a second conductive pattern on the first diffusion barrier, the second conductive pattern including a metal,
- wherein the first conductive pattern, the first ohmic contact pattern, the first oxidation prevention pattern, the first diffusion barrier, and the second conductive pattern are sequentially stacked in the stated order.
A semiconductor device, comprising:
- an active pattern on a substrate;
- a gate structure buried at an upper portion of the active pattern;
- a bit line structure on the active pattern;
- a contact plug structure on a portion of the active pattern adjacent to the bit line structure;
- and
- a capacitor on the contact plug structure,
- wherein the bit line structure includes:
- a first conductive pattern including doped polysilicon;
- a first ohmic contact pattern on the first conductive pattern, the first ohmic contact pattern including a metal silicide;
- a first diffusion barrier on the first ohmic contact pattern, the first diffusion barrier including graphene;
- an oxidation prevention pattern on the first diffusion barrier, the oxidation prevention pattern including a metal nitride;
- and
- a second conductive pattern on the oxidation prevention pattern, the second conductive pattern including a metal,
- wherein the first conductive pattern, the first ohmic contact pattern, the first diffusion barrier, the oxidation prevention pattern, and the second conductive pattern are sequentially stacked in the stated order.
Dependencies are inferred from the claim text.