Semiconductor device

A semiconductor device, comprising:

• a semiconductor substrate;
• an under-bump pattern on the semiconductor substrate and including a first metal;
• and
• a bump pattern on the under-bump pattern,
• wherein the bump pattern includes:
• a support pattern in contact with the under-bump pattern and including a second metal or an intermetallic compound of the first metal and the second metal;
• and
• a pillar pattern directly on the support pattern and including the second metal,
• wherein the second metal is different from the first metal and the second metal includes a solder material, and
• wherein a width of the support pattern is greater than a width of the pillar pattern.

A semiconductor device, comprising:

• a semiconductor substrate;
• a circuit layer on the semiconductor substrate, the circuit layer including
• an integrated circuit on a first surface of the semiconductor substrate,
• a dielectric pattern that covers the integrated circuit,
• a conductive structure in the dielectric pattern and coupled to the integrated circuit, and
• a terminal pad coupled to the conductive structure;
• a plurality of under-bump patterns on the circuit layer and including a first metal;
• a protective layer on the circuit layer and covering a sidewall of the under-bump pattern;
• a plurality of bump patterns on corresponding ones of the plurality of the under-bump patterns, respectively;
• and
• an organic dielectric layer on the protective layer and covering sidewalls of the bump patterns,
• wherein each of the bump patterns includes:
• a support pattern in contact with one of the under-bump patterns and having a first width;
• and
• a solder pillar pattern connected to the support pattern and having a second width, the first width being greater than the second width,
• wherein the first width is the same as or less than a width of the under-bump pattern,
• wherein the solder pillar pattern includes a second metal different from the first metal, and
• wherein the support pattern includes at least one of the second metal and an intermetallic compound,
• wherein the intermetallic compound includes the first metal and the second metal.

A semiconductor device, comprising:

• a semiconductor substrate;
• an under-bump pattern on the semiconductor substrate and including a first metal;
• and
• a bump pattern on the under-bump pattern,
• an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern
• wherein the bump pattern includes:
• a support pattern in contact with the under-bump pattern and including a second metal or an intermetallic compound of the first metal and the second metal;
• and
• a pillar pattern directly on the support pattern and including the second metal,
• wherein the second metal is different from the first metal, and
• wherein a width of the support pattern is greater than a width of the pillar pattern.