Structure and method for isolation of bit-line drivers for a three-dimensional NAND

A three-dimensional (3D) memory device, comprising:

• a peripheral circuitry formed on a first substrate, the peripheral circuitry comprising:
• peripheral devices on a first side of the first substrate;
• a shallow-trench-isolation extending into the first substrate from the first side;
• a first interconnect layer disposed on the peripheral devices;
• and
• a deep-trench-isolation extending into the first substrate from a second side of the first substrate, wherein:
• the first and second sides are opposite sides of the first substrate;
• the deep-trench-isolation penetrates through the first substrate and contacts the first interconnect layer;
• and
• the deep-trench-isolation is configured to provide electrical isolation between neighboring peripheral devices;
• and
• a memory array formed on a second substrate, the memory array comprising:
• at least one memory cell;
• and
• a second interconnect layer disposed on the at least one memory cell, wherein the second interconnect layer of the memory array is bonded with the first interconnect layer of the peripheral circuitry, and at least one of the peripheral devices is electrically connected with the at least one memory cell.