Methods for making double-sided semiconductor devices and related devices, assemblies, packages and systems
AssigneeMicron Technology, Inc.
InventorHyunsuk Chun
Life of this patent
Estimating the term…
Abstract
Semiconductor devices may include a die including a semiconductor material. The die may include a first active surface including first integrated circuitry on a first side of the die and a second active surface including second integrated circuitry on a second, opposite side of the die. In some embodiments, the die may include two die portions: a first die portion including the first active surface and a second die portion including the second active surface. The first die portion and the second die portion may be joined together with the first active surface facing away from the second active surface.
Claims24
A semiconductor device, comprising:
- a die comprising a semiconductor material, the die comprising two die portions:
- a first active surface comprising first active circuitry on a first die portion;
- and
- a second active surface comprising second active circuitry on a second die portion;
- the first die portion and the second die portion joined together with the first active surface facing away from the second active surface;
- wherein a first FEOL structure adjacent to the first die portion includes the first active circuitry, a first BEOL structure is located on a side of the first FEOL structure opposite the first die portion, and a first interconnect adjacent to the first BEOL structure is located opposite the first FEOL structure;
- and
- wherein a second FEOL structure adjacent to the second die portion includes the second active circuitry, a second BEOL structure is located on a side of the second FEOL structure opposite the second die portion, and a second interconnect adjacent to the second BEOL structure is located opposite the second FEOL structure.
An assembly of semiconductor devices, comprising:
- stacked semiconductor memory devices, at least each underlying respective semiconductor memory device located below an overlying respective semiconductor memory device in the stack comprising:
- a composite semiconductor die comprising two die portions joined back-to-back;
- a first active surface comprising first integrated memory circuitry on a first die portion;
- and
- a second active surface comprising second integrated memory circuitry on a second die portion;
- wherein a first FEOL structure adjacent to the first die portion includes the first active circuitry, a first BEOL structure is located on a side of the first FEOL structure opposite the first die portion, and a first interconnect adjacent to the first BEOL structure is located opposite the first FEOL structure;
- and
- wherein a second FEOL structure adjacent to the second die portion includes the second active circuitry, a second BEOL structure is located on a side of the second FEOL structure opposite the second die portion, and a second interconnect adjacent to the second BEOL structure is located opposite the second FEOL structure.
A method of making a semiconductor device, comprising:
- forming first integrated circuitry on a first active surface on a first side of a die comprising a semiconductor material;
- forming a first FEOL structure adjacent to the first side, the first FEOL structure comprising the first integrated circuitry;
- forming a first BEOL structure on a side of the first FEOL structure opposite the die;
- forming a first interconnect adjacent to the first BEOL structure and located opposite the first FEOL structure;
- forming second integrated circuitry on a second active surface on a second, opposite side of the die;
- forming a second FEOL structure adjacent to the second side, the second FEOL structure comprising the second integrated circuitry;
- forming a second BEOL structure on a side of the second FEOL structure opposite the die;
- and
- forming a second interconnect adjacent to the second BEOL structure and located opposite the second FEOL structure.
A method of forming a semiconductor device, comprising:
- independently forming an FEOL structure, a BEOL structure, and an interconnect on active surfaces of each of two separate die portions comprising semiconductor material;
- and
- bonding the two separate die portions by back sides thereof opposite the active surfaces.
An electronic system, comprising:
- an input device;
- an output device;
- at least one processor;
- and
- at least one memory device comprising a semiconductor material having active surfaces comprising integrated circuitry on opposing sides thereof;
- wherein a first FEOL structure adjacent to a first active surface of the at least one memory device includes first integrated circuitry, a first BEOL structure is located on a side of the first FEOL structure, and a first interconnect adjacent to the first BEOL structure is located opposite the first FEOL structure;
- and
- wherein a second FEOL structure adjacent to a second, opposite active surface of the at least one memory device includes second integrated circuitry, a second BEOL structure is located on a side of the second FEOL structure, and a second interconnect adjacent to the second BEOL structure is located opposite the second FEOL structure.
Dependencies are inferred from the claim text.