Inductor capacitor filter in far back end of line and integration schemes

The semiconductor device of claim further comprising:

• a second insulating layer over the capacitor and the inductor;
• an opening in the second insulating layer exposing a portion of the metal fill layer of the capacitor and the second metallization layer of the inductor for connection to a common input node.

The semiconductor device of claim further comprising:

• a second metallization structure below the first electrode layer of the capacitor, wherein a top surface of the second metallization structure is substantially level with a top surface of the first metallization layer of the inductor.

A semiconductor device comprising:

• an inductor in a far back end of line (far BEOL) layer, the inductor comprises a first metallization layer, a second metallization layer over the first metallization layer, a contact pillar connecting the first metallization layer and the second metallization layer, and a magnetic core between the first and second metallization layers;
• and
• a capacitor adjacent to and electrically coupled to the inductor, wherein the capacitor comprises a first electrode layer arranged over sidewalls and a bottom surface of a via opening in a first insulating layer, the first electrode layer extends over at least a portion of a top surface of the first insulating layer, a dielectric layer over the first electrode layer, a second electrode layer over the dielectric layer, and a metal fill layer over the second electrode layer, the metal fill layer having a top surface at least level with a top surface of the second electrode layer over the first insulating layer.

A method of fabricating a semiconductor device comprising:

• forming an inductor in a far back end of line (far BEOL) layer, the inductor comprises a first metallization layer, a second metallization layer over the first metallization layer, a contact pillar connecting the first metallization layer and the second metallization layer, and a magnetic core between the first and second metallization layers;
• and
• forming a capacitor adjacent to and electrically coupled to the inductor, wherein the formation of the capacitor comprises providing a first electrode layer arranged over sidewalls and a bottom surface of a via opening in a first insulating layer, providing a dielectric layer over the first electrode layer, providing a second electrode layer over the dielectric layer, and providing a metal fill layer over the second electrode layer, the metal fill layer having a top surface at least level with a top surface of the first insulating layer.