Interposer structure, semiconductor package comprising the same, and method for fabricating the same

An interposer structure comprising:

• an interposer substrate on which an active element including a transistor is not formed;
• an interlayer insulating film which covers a top surface of the interposer substrate;
• a capacitor structure in the interlayer insulating film;
• a wiring structure including a first wiring pattern and a second wiring pattern spaced apart from the first wiring pattern, on the interlayer insulating film;
• a connection pattern which extends along a part of the top surface of the interposer substrate and is connected to a bottom surface of the lower electrode;
• a first connection via which penetrates the interlayer insulating film and connects a upper electrode and the first wiring pattern;
• and
• a second connection via which penetrates the interlayer insulating film and connects the connection pattern and the second wiring pattern.

An interposer structure comprising:

• an interposer substrate on which an active element including a transistor is not formed;
• a first interlayer insulating film which covers a top surface of the interposer substrate;
• a capacitor structure in the first interlayer insulating film, the capacitor structure including a lower electrode;
• a wiring structure which includes a second interlayer insulating film which covers a top surface of the first interlayer insulating film, and a plurality of wiring patterns and a plurality of vias in the second interlayer insulating film;
• a penetration via which penetrates the interposer substrate and the first interlayer insulating film and is connected to the wiring structure;
• and
• a connection pattern which extends along a part of the top surface of the interposer substrate and physically contacts a bottom surface of the lower electrode,
• wherein the capacitor structure is connected to the penetration via.

A semiconductor package comprising:

• a package substrate;
• an interposer structure which is mounted on the package substrate;
• and
• a first semiconductor chip which is mounted on the interposer structure,
• wherein the interposer structure includes:
• an interposer substrate,
• an interlayer insulating film which covers a top surface of the interposer substrate,
• a capacitor structure in the interlayer insulating film, including a lower electrode,
• a wiring structure which covers a top surface of the interlayer insulating film and is connected to the first semiconductor chip, and
• a connection pattern which extends along a part of the top surface of the interposer substrate and physically contacts a bottom surface of the lower electrode.