Semiconductor package

A semiconductor package, comprising:

• a redistribution substrate including a first redistribution layer;
• a semiconductor chip on the redistribution substrate and connected to the first redistribution layer;
• a vertical connection conductor on the redistribution substrate, and electrically connected to the semiconductor chip through the first redistribution layer;
• a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor;
• and
• an encapsulant covering at least a portion of each of the semiconductor chip, the vertical connection conductor, and the core member, the encapsulant filling the first and second through-holes,
• wherein the vertical connection conductor has a cross-sectional shape, in which a side surface of the vertical connection conductor is tapered such that a width of a lower surface thereof is narrower than a width of an upper surface thereof, and
• the first and second through-holes have a cross-sectional shape tapered in a direction opposite to the vertical connection conductor, respectively.

A semiconductor package, comprising:

• a redistribution substrate including a first redistribution layer;
• a semiconductor chip on the redistribution substrate, and having a connection pad connected to the first redistribution layer;
• a vertical connection conductor spaced apart from the semiconductor chip on the redistribution substrate, and electrically connected to the connection pad through the first redistribution layer;
• a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor;
• an encapsulant on the redistribution substrate and filling the first and second through-holes, respectively, the encapsulant covering an upper surface of the semiconductor chip and an external side surface of the core member;
• and
• a redistribution member on an upper surface of the encapsulant, and having a second redistribution layer electrically connected to the vertical connection conductor,
• wherein the upper surface of the encapsulant is coplanar with an upper surface of the vertical connection conductor and an upper surface of the core member,
• a planar area of a lower surface of the vertical connection conductor is smaller than a planar area of the upper surface of the vertical connection conductor, and
• a planar area of a lower surface of the core member is smaller than a planar area of the upper surface of the core member.