Power semiconductor package with highly reliable chip topside

A power semiconductor module, comprising:

• a substrate with a metallization layer;
• a power semiconductor chip bonded to the metallization layer of the substrate;
• a metallic plate bonded having a central part and a border that are both bonded to a surface of the power semiconductor chip opposite to the substrate, wherein the central part of the metallic plate is structured differently than the border of the metallic plate so that thermal stresses at the border are lower during operation of the power semiconductor module and so that the central part of the metallic plate has a lower resistivity than the border of the metallic plate;
• and
• a plurality of metallic interconnection elements bonded to a second surface of the metallic plate at the central part.

A method of manufacturing a power semiconductor module, the method comprising:

• bonding a power semiconductor chip to a metallization layer of a substrate;
• structuring a border of a metallic plate, such that the metallic plate has less metal material per volume at the border as compared to a central part of the metallic plate;
• bonding a first surface of the metallic plate to the power semiconductor chip opposite to the substrate, wherein the central part and the border are both bonded to the power semiconductor chip;
• and
• attaching a plurality of interconnection elements to a second surface of the metallic plate at the central part of the metallic plate.