Impedance matching network and method with reduced memory requirements

A semiconductor processing tool comprising:

• a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate;
• and
• an impedance matching network operably coupled to the plasma chamber, the matching network comprising:
• an RF input configured to operably couple to an RF source;
• an RF output configured to operably couple to the plasma chamber;
• a first reactance element configured to provide a variable first reactance element position, the first reactance element position controlling the total reactance provided by the first reactance element;
• a second reactance element configured to provide a variable second reactance element position, the second reactance element position controlling the total reactance provided by the second reactance element;
• a control circuit configured to carry out a matching process of:
• detecting, by a sensor, a value related to the plasma chamber or the matching network;
• determining a first parameter of the matching network based on the detected value;
• determining first two-port parameters from a first one-dimensional array that corresponds to a first portion of the matching network using the first reactance element position;
• determining second two-port parameters from a second one-dimensional array that corresponds to a second portion of the matching network using the second reactance element position, the second portion of the matching network being distinct from the first portion;
• calculating an output parameter of the RF output based on the first parameter, the first two-port parameters, and the second two-port parameters;
• determining a new first reactance element position and a new second reactance element position from a match position table using the calculated output parameter;
• and
• altering the first reactance element to the new first reactance element position, and altering the second reactance element to the new second reactance element position to reduce a reflected power.

A method of matching an impedance, the method comprising:

• a) operably coupling a radio frequency (RF) input of a matching network to an RF source, and operably coupling an RF output of the matching network to a plasma chamber, wherein the matching network comprises:
• i) a first reactance element configured to provide a variable first reactance element position, the first reactance element position controlling the total reactance provided by the first reactance element;
• and
• ii) a second reactance element configured to provide a variable second reactance element position, the second reactance element position controlling the total reactance provided by the second reactance element;
• b) detecting, by a sensor, a value related to the plasma chamber or the matching network;
• c) determining a first parameter of the matching network based on the detected value;
• d) determining first two-port parameters from a first one-dimensional array that corresponds to a first portion of the matching network using the first reactance element position;
• e) determining second two-port parameters from a second one-dimensional array that corresponds to a second portion of the matching network using the second reactance element position, the second portion of the matching network being distinct from the first portion;
• f) calculating an output parameter of the RF output based on the first parameter, the first two-port parameters, and the second two-port parameters;
• g) determining a new first reactance element position and a new second reactance element position from a match position table using the calculated output parameter;
• and
• h) altering the first reactance element to the new first reactance element position, and altering the second reactance element to the new second reactance element position to reduce a reflected power.

A method of manufacturing a semiconductor, the method comprising:

• placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate;
• and
• operably coupling a radio frequency (RF) input of a matching network to an RF source, and operably coupling an RF output of the matching network to the plasma chamber, wherein the matching network comprises:
• a first reactance element configured to provide a variable first reactance element position, the first reactance element position controlling the total reactance provided by the first reactance element;
• and
• a second reactance element configured to provide a variable second reactance element position, the second reactance element position controlling the total reactance provided by the second reactance element;
• detecting, by a sensor, a value related to the plasma chamber or the matching network;
• determining a first parameter of the matching network based on the detected value;
• determining first two-port parameters from a first one-dimensional array that corresponds to a first portion of the matching network using the first reactance element position;
• determining second two-port parameters from a second one-dimensional array that corresponds to a second portion of the matching network using the second reactance element position, the second portion of the matching network being distinct from the first portion;
• calculating an output parameter of the RF output based on the first parameter, the first two-port parameters, and the second two-port parameters;
• determining a new first reactance element position and a new second reactance element position from a match position table using the calculated output parameter;
• and
• altering the first reactance element to the new first reactance element position, and altering the second reactance element to the new second reactance element position to reduce a reflected power.