Negative gate stress operation in multi-pass programming and memory device thereof

A method for operating a memory device comprising an array of memory cells arranged in a plurality of rows and a plurality of word lines respectively coupled to the plurality of rows of the memory cells, the method comprising:

• performing multi-pass programming on a first row of memory cells coupled to a first word line of the plurality of word lines, the multi-pass programming comprising a plurality of programming passes, each of the programming passes comprising a programming operation and a verify operation, wherein performing the multi-pass programming comprises,
• in a non-last programming pass of memory cells, perform a negative gate stress (NGS) operation on a memory cell in the first row of memory cells between the programming operation and the verify operation;
• and
• at a same time, perform a NGS operation on a memory cell in a second row of memory cells coupled to a second word line of the word lines, the second word line being adjacent to the first word line, wherein the first word line is selected and the second word line is unselected.

A system, comprising:

• a memory device configured to store data, the memory device comprising:
• an array of memory cells arranged in a plurality of rows;
• a plurality of word lines respectively coupled to the plurality of rows of the memory cells;
• and
• a peripheral circuit coupled to the word lines and configured to perform multi-pass programming on a selected row of memory cells coupled to a selected word line of the plurality of word lines, the multi-pass programming comprising a plurality of programming passes, each of the programming passes comprising a programming operation and a verify operation, wherein, to perform the multi-pass programming, the peripheral circuit is configured to, in a non-last programming pass of memory cells,
• perform a negative gate stress (NGS) operation on a memory cell in the selected row of memory cells between the programming operation and the verify operation;
• and
• at a same time, perform a NGS operation on a memory cell in an unselected row of memory cells coupled to an unselected word line of the plurality of word lines, the unselected word line being adjacent to the selected word line;
• and
• a memory controller coupled to the memory device and configured to control the memory device.