Memory device that executes a read operation based on a self-reference scheme

A memory device comprising:

• a memory cell;
• and
• a read circuit configured to sense a first signal based on first data in the memory cell, write second data in the memory cell, sense a second signal based on the second data in the memory cell, and read data in the memory cell based on a comparison result between the first signal and the second signal,
• wherein:
• the read circuit includes a pre-stage sense amplifier circuit configured to sense the first signal and the second signal, and
• the pre-stage sense amplifier circuit includes:
• a current mirror circuit configured to cause a first current to flow in a first node connected to the memory cell and cause a second current to flow in a second node based on a potential of the first node,
• a first switching element including a first terminal connected to the second node and a second terminal connected to a third node,
• a first transistor including a third terminal connected to the second node and a first gate connected to the third node,
• a second switching element including a fourth terminal connected to the second node and a fifth terminal connected to a fourth node, and
• a first circuit connected to the second node and the third node and configured to cause a third current to flow in the second node based on a potential of the third node.