Quantum circuit embedding by simulated annealing

A computer program product for mapping a quantum circuit to hardware, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:

• selecting a first candidate subgraph of a hardware graph, the hardware graph representing a physical quantum circuit, the hardware graph comprising a plurality of nodes corresponding to physical qubits and a plurality of edges corresponding to coupling of the plurality of physical qubits;
• determining an accepted subgraph by:
• setting the accepted subgraph to be the first candidate subgraph;
• mapping a quantum circuit comprising a plurality of logical qubits to the accepted subgraph;
• generating a second candidate subgraph of the hardware graph based on the accepted subgraph;
• mapping the quantum circuit to the second candidate subgraph;
• comparing fidelities of the accepted subgraph and the second candidate subgraph for the quantum circuit;
• if the fidelity of the second candidate subgraph is greater than the fidelity of the accepted subgraph, setting the accepted subgraph to be the second candidate subgraph;
• if the fidelity of the second candidate subgraph is less than or equal to the fidelity of the accepted subgraph, setting the accepted subgraph to be the second candidate subgraph with a time-dependent probability.