Transparent network access control for spatial accelerator device multi-tenancy

A method comprising:

• establishing, by a secure device manager (SDM) of a hardware accelerator device, a network-on-chip (NoC) communication path in the hardware accelerator device, the NoC communication path comprising a plurality of NoC nodes for ingress and egress of communications on the NoC communication path;
• for each NoC node of the NoC communication path, configuring, by the SDM, a programmable register of the NoC node to indicate a node group that the NoC node is assigned, the node group corresponding to a persona configured on the hardware accelerator device;
• determining, by the SDM, whether a prefix of received data at the NoC node matches the node group indicated by the programmable register of the NoC;
• and
• responsive to determining that the prefix does not match the node group, discarding, by the SDM, the data from the NoC node.

A non-transitory machine readable storage medium comprising instructions that, when executed, cause at least one processor to at least:

• establish, by a secure device manager (SDM) of a hardware accelerator device comprising the at least one processor, a network-on-chip (NoC) communication path in the hardware accelerator device, the NoC communication path comprising a plurality of NoC nodes for ingress and egress of communications on the NoC communication path;
• for each NoC node of the NoC communication path, configure, by the SDM, a programmable register of the NoC node to indicate a node group that the NoC node is assigned, the node group corresponding to a persona configured on the hardware accelerator device;
• determine, by the SDM, whether a prefix of received data at the NoC node matches the node group indicated by the programmable register of the NoC;
• and
• responsive to determining that the prefix does not match the node group, discard, by the SDM, the data from the NoC node.