Inter cluster snoop latency reduction

A memory controller comprising:

• a coherence point circuit that is a point of coherency for a plurality of coherent agents in a cache coherence protocol implemented by a system that includes the memory controller, wherein:
• the coherence point circuit is configured to generate one or more coherence requests to maintain cache coherency for a given memory request,
• the coherence point circuit is configured to detect that a first coherent agent of the plurality of coherent agents has a modified copy of data that is targeted by a read request from a second coherent agent of the plurality of coherent agents responsive to receiving the read request from an interconnect,
• the coherence point circuit is configured to issue a copy back request to the first coherent agent responsive to detecting the modified copy, and
• the coherence point circuit is configured to include an indication in the copy back request that the modified copy is to be bypassed from the first coherent agent to the second coherent agent in the interconnect during a copy back response by the first coherent agent to the copy back request.

A method, in a system comprising a plurality of coherent agents, a memory controller, and an interconnect coupled to the plurality of coherent agents and the memory controller, the method comprising:

• receiving a read request in the memory controller for a first coherent agent of the plurality of coherent agents;
• determining that a second coherent agent of the plurality of coherent agents has a modified copy of data corresponding to the read request;
• and
• issuing a copy back request from the memory controller to the second coherent agent, wherein the copy back request includes an indication that the data is to be bypassed in the interconnect during a copy back response from the second coherent agent.