Non-volatile memory based processors and dataflow techniques

A processor comprising:

• a plurality of processing elements of a monolithic integrated circuit, wherein;
• each processing element includes a processing circuitry and a non-volatile memory circuitry;
• the compute circuitry of respective processing elements are configurable to perform a respective computation;
• the non-volatile memory circuitry of respective processing elements are configurable to store a respective set of weights or kernel functions;
• and
• the plurality of processing elements are configurable to pass data between processing elements, wherein results of one or more computations performed by one or more of the compute circuitry passes as operands to one or more other of the compute circuitry to perform one or more other computations without the results of the one or more computations being written to the one or more non-volatile memory circuits.

A processor configuration method comprising:

• receiving a compute model including a plurality of nodes, edges coupling various ones of the plurality of nodes together, and weights of respective nodes;
• configuring compute circuitry of a plurality of processing elements based on respective ones of the plurality of nodes;
• configuring data flow between the configured processing elements based on the edges, wherein results of one or more computations performed by one or more of the compute circuitry is passed as operands to one or more other of the compute circuitry to perform one or more other computations without the results of the one or more computations being written to non-volatile memory circuitry;
• and
• loading the weights of respective nodes into the non-volatile memory circuitry of respective processing elements.