US 11,537,532 B2 · Lookahead priority collection to support priority elevation

Abstract

A queuing requester for access to a memory system is provided. Transaction requests are received from two or more requestors for access to the memory system. Each transaction request includes an associated priority value. A request queue of the received transaction requests is formed in the queuing requester. Each transaction request includes an associated priority value. A highest priority value of all pending transaction requests within the request queue is determined. An elevated priority value is selected when the highest priority value is higher than the priority value of an oldest transaction request in the request queue; otherwise the priority value of the oldest transaction request is selected. The oldest transaction request in the request queue with the selected priority value is then provided to the memory system. An arbitration contest with other requesters for access to the memory system is performed using the selected priority value.

Claims20

Dependent claims

A system-on-a-chip comprising:

a set of processing cores;
a shared memory;
an interconnect coupling the set of processing cores to the shared memory, wherein each of the set of processing cores includes:
a memory controller coupled to the interconnect that includes:
a pipeline that includes registers to store a set of transaction requests and a set of priorities associated with the set of transaction requests, wherein the pipeline is configured to provide a first transaction request of the set of transaction requests to the interconnect;
and
merge logic coupled to the pipeline and configured to cause an external priority to be provided to the interconnect along with the first transaction request such that:
when a second priority associated with a second transaction request of the set of transaction requests is greater than a first priority associated with the first transaction request, cause the external priority to be based on the second priority;
and
when the second priority is not greater than the first priority, cause the external priority to be based on the first priority of the first transaction request.

7 more elements

A circuit comprising:

a core that includes a controller configured to couple the core to an interconnect, wherein the controller includes:
a pipeline component configured to:
receive a first transaction request, a first priority associated with the first transaction request, a second transaction request, and a second priority associated with the second transaction request;
store the first and second transaction requests and the first and second priorities;
and
provide the first transaction request to the interconnect;
merge logic coupled to the pipeline component and configured to:
compare the first priority to the second priority;
and
cause an external priority to be provided to the interconnect that is associated with the first transaction request such that:
when the second priority is greater than the first priority, cause the external priority to be based on the second priority of the second transaction request;
and
when the second priority is not greater than the first priority, cause the external priority to be based on the first priority of the first transaction request.

10 more elements

Dependencies are inferred from the claim text.

Lookahead priority collection to support priority elevation

Life of this patent

Lookahead priority collection to support priority elevation

Life of this patent

Abstract

Claims20