Information processing apparatus, information processing circuit, information processing system, and information processing method
AssigneeInter-University Research Institute Corporation Research Organization of Information and Systems
InventorsMasaki Waga, Ichiro Hasuo
Life of this patent
Estimating the term…
Abstract
An information processing apparatus according to an aspect of the present invention includes an information processing circuit configured to generate a finite state machine based on a predetermined matching condition with respect to sequence data of an event that is input to the information processing apparatus; to process the sequence data so as to substantially remove data that does not match the matching condition from the sequence data; and to output the processed sequence data.
Claims14
An information processing apparatus comprising:
- an information processing circuit configured
- to generate a finite state machine based on a predetermined matching condition with respect to sequence data of an event that is input to the information processing apparatus;
- to process the sequence data so as to remove data that does not match the matching condition from the sequence data;
- and
- to output the processed sequence data,
- wherein
- the finite state machine includes a FIFO buffer having N number of memory blocks, and information about a rule of state transition of the finite state machine;
- and
- each of the memory blocks includes an area for storing a flag indicating either a first state or a second state.
An information processing circuit configured:
- to receive a matching condition for searching for a given pattern from sequence data including a plurality of symbols;
- and
- to generate a finite state machine based on the received matching condition, the finite state machine being configured to generate information for removing data that does not match the matching condition from the sequence data,
- wherein
- the finite state machine includes a FIFO buffer having N number of memory blocks, and information about a rule of state transition of the finite state machine;
- and
- each of the memory blocks includes an area for storing a flag indicating either a first state or a second state.
A method of applying a predetermined process to sequence data of an event that is input to an information processing apparatus, the method performed by an information processing circuit in the information processing apparatus comprising:
- receiving an automaton describing a predetermined matching condition with respect to the sequence data;
- generating a finite state machine based on the automaton;
- receiving an input of the sequence data;
- processing the sequence data so as to remove data that does not match the matching condition from the sequence data;
- and
- outputting the processed sequence data,
- wherein
- the finite state machine includes a FIFO buffer having N number of memory blocks, and information about a rule of state transition of the finite state machine;
- and
- each of the memory blocks includes an area for storing a flag indicating either a first state or a second state.
Dependencies are inferred from the claim text.