Memory devices, systems, and methods for updating firmware with single memory device

A memory device, comprising:

• at least one memory cell array formed in a substrate arranged into a plurality of separate regions, each region including a plurality of nonvolatile memory cells;
• mapping circuits formed in the substrate and configured to map addresses of each region to any one of a plurality of processor address spaces in response to remap data received from a processor device, the processor address spaces including a boot address space from which the processor device accesses in a boot operation;
• a configuration store formed in the substrate and coupled to the mapping circuits and configured to store the remap data;
• and
• control circuits formed in the substrate and configured to enable access by the processor device to one region mapped to the boot address space storing one version of processor boot instructions, while writing another version of the processor boot instructions to another region.

A system, comprising:

• a nonvolatile memory (NVM) device including
• nonvolatile memory cells arranged into a plurality of regions configured to store at least instruction data, and
• mapping circuits configured to assign any of a plurality of different processor memory address ranges to each region in response to remap data;
• a processor device is coupled to the NVM device by at least one bus, the processor device configured to
• execute boot instruction data in a boot operation by accessing a predetermined processor memory address range that is mapped to a first region of the NVM device by the mapping circuits of the NVM device, and
• transmit remap data to the NVM device to reconfigure the mapping circuits of the NVM device to remap the predetermined processor memory address range to a second region of the NVM device that stores updated boot instruction data for execution by the processor device.