Processing unit, method and computer program for multiplying at least two multiplicands

A method for multiplying at least two multiplicands in a processing unit, the processing unit including at least one bitshift unit, an arithmetic unit, and a storage device, the multiplicands each having a first exponent and a first base, each of the first bases having a second base, a second exponent, and a third exponent, the method comprising the following steps:

• providing the first exponents of the multiplicands and the third exponents, each of the provided first exponents and the third exponents being quantized;
• subtracting, by the arithmetic unit, the third exponents;
• first shifting of a binary number of the first exponents of one of the multiplicands by a number of places of a value of the subtracted third exponents, wherein the first shifting is carried out by the at least one bitshift unit filling in a plurality of zeros on the right side of a register of the at least one bitshift unit as a function of the value of the subtraction of the third exponents;
• adding, by the arithmetic unit, a result of the first shifting to the first exponent of the one of the multiplicands;
• splitting up a result of the addition into an integer part and a fractional part as a function of a smaller exponent of the third exponents;
• fetching a binary number of the fractional part out of the storage device, wherein the fractional part is used as an address for fetching the binary value of the fractional part out of the storage device;
• and
• second shifting of the binary number of the fractional part by a number of places of a value of the integer part by the at least one bitshift unit.

A method for operating a machine learning system, in each instance, a plurality of parameters of the machine learning system and intermediate variables of the machine learning system being stored as multiplicands in a storage device, using an exponential notation, each of the stored multiplicands having a first exponent and a first base, each of the first bases having a second base, a second exponent, and a third exponent, multiplications of at least two of the stored multiplicands being carried out by a processing unit, the processing unit including at least one bitshift unit, an arithmetic unit, and a storage device, performing the following steps:

• providing the first exponents of the at least two multiplicands and the third exponents of the first bases of the at least two of the multiplicands, each of the provided first exponents and the third exponents being quantized;
• subtracting, by the arithmetic unit, the third exponents of the first bases of the at least two of the multiplicands;
• first shifting of a binary number of the first exponents of one of the at least two multiplicands by a number of places of a value of the subtracted third exponents, wherein the first shifting is carried out by the at least one bitshift unit filling in a plurality of zeros on the right side of a register of the at least one bitshift unit as a function of the value of the subtraction of the third exponents;
• adding, by the arithmetic unit, a result of the first shifting to the first exponent of the one of the at least two multiplicands;
• splitting up a result of the addition into an integer part and a fractional part as a function of a smaller exponent of the third exponents of the first bases of the at least two of the multiplicands;
• fetching a binary number of the fractional part out of the storage device, wherein the fractional part is used as an address for fetching the binary value of the fractional part out of the storage device;
• and
• second shifting of the binary number of the fractional part by a number of places of a value of the integer part by the at least one bitshift unit.

A non-transitory machine-readable storage element on which is stored a computer program for multiplying at least two multiplicands in a processing unit, the processing unit including at least one bitshift unit, an arithmetic unit, and a storage device, the multiplicands each having a first exponent and a first base, each of the first bases having a second base, a second exponent, and a third exponent, the computer program, when executed by a computer, causing the computer to perform the following steps:

• providing the first exponents of the multiplicands and the third exponents, each of the provided first exponents and the third exponents being quantized;
• subtracting, by the arithmetic unit, the third exponents;
• first shifting of a binary number of the first exponents of one of the multiplicands by a number of places of a value of the subtracted third exponents, wherein the first shifting is carried out by the at least one bitshift unit filling in a plurality of zeros on the right side of a register of the at least one bitshift unit as a function of the value of the subtraction of the third exponents;
• adding, by the arithmetic unit, a result of the first shifting to the first exponent of the one of the multiplicands;
• splitting up a result of the addition into an integer part and a fractional part as a function of a smaller exponent of the third exponents;
• fetching a binary number of the fractional part out of the storage device, wherein the fractional part is used as an address for fetching the binary value of the fractional part out of the storage device;
• and
• second shifting of the binary number of the fractional part by a number of places of a value of the integer part by the at least one bitshift unit.

A non-transitory machine-readable storage element on which is stored a computer program for operating a machine learning system, in each instance, a plurality of parameters of the machine learning system and intermediate variables of the machine learning system being stored as multiplicands in a storage device, using an exponential notation, each of the stored multiplicands having a first exponent and a first base, each of the first bases having a second base, a second exponent, and a third exponent, the computer program, when executed by a computer, the computer including at least one bitshift unit, an arithmetic unit, and a storage device, causing the computer to perform multiplications of at least two of the stored multiplicands by performing the following steps:

• providing the first exponents of the at least two multiplicands and the third exponents of the first bases of the at least two of the multiplicands, each of the provided first exponents and the third exponents being quantized;
• subtracting, by the arithmetic unit, the third exponents of the first bases of the at least two of the multiplicands;
• first shifting of a binary number of the first exponents of one of the at least two multiplicands by a number of places of a value of the subtracted third exponents, wherein the first shifting is carried out by the at least one bitshift unit filling in a plurality of zeros on the right side of a register of the at least one bitshift unit as a function of the value of the subtraction of the third exponents;
• adding, by the arithmetic unit, a result of the first shifting to the first exponent of the one of the at least two multiplicands;
• splitting up a result of the addition into an integer part and a fractional part as a function of a smaller exponent of the third exponents of the first bases of the at least two of the multiplicands;
• fetching a binary number of the fractional part out of the storage device, wherein the fractional part is used as an address for fetching the binary value of the fractional part out of the storage device;
• and
• second shifting of the binary number of the fractional part by a number of places of a value of the integer part by the at least one bitshift unit.