Device, board, liquid accommodation container, and printing system
AssigneeSeiko Epson Corporation
InventorsShuichi Nakano, Yasuhiko Kosugi, Jun Sato
Life of this patent
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Abstract
A device outputs a first low voltage to a first terminal at a first timing in a period in which a voltage input to a second terminal is a high voltage. After outputting the first low voltage, the device outputs a second high voltage to the first terminal at a second timing in a period in which the voltage input to the second terminal is a low voltage. After outputting the second high voltage, the device outputs a second low voltage to the first terminal at a third timing in a period in which the voltage input to the second terminal is a high voltage.
Claims10
A device configured with a processor, the device configured to be electrically coupled to a plurality of terminals of a liquid accommodation container that can be mounted in an accommodation section of a printing apparatus, the printing apparatus further including a printing head, and the accommodation section provided with:
- (i) a liquid introduction portion that introduces a liquid to the printing head, and (ii) a plurality of apparatus-side terminals, wherein
- the processor of the device programmed to satisfy I, II, III, and IV as follows,
- I:
- output to a data terminal provided in the plurality of terminals, a first response signal containing a first low voltage and
- output a second response signal containing a second high voltage and a second low voltage lower than the second high voltage,
- II:
- the first response signal and the second response signal are output at a predetermined timing such that, in relation to a clock signal, the first response signal and the second response signal indicate to the printing apparatus that the data terminal does not have a short circuit with other terminals other than the data terminal among the plurality of terminals and that the liquid accommodation container is being mounted in the printing apparatus,
- III:
- output to the data terminal the first response signal followed by the second response signal, and
- IV:
- receive at a clock terminal provided in the other terminals, the clock signal in which a low voltage and a high voltage alternately repeat with a predetermined cycle,
- the first low voltage is output to the data terminal at a first time in a cycle in which a voltage received at the clock terminal is the high voltage,
- after the first low voltage is output, the second high voltage is output to the data terminal at a second time in a cycle in which the voltage received at the clock terminal is the low voltage, and
- after the second high voltage is output, the second low voltage is output to the data terminal at a third time in a cycle in which the voltage received at the clock terminal is the high voltage.
Dependencies are inferred from the claim text.