Methods, systems, articles of manufacture and apparatus to improve resource utilization for binary tree structures

A method to improve resource utilization for field programmable gate array (FPGA) resources, the method comprising:

• retrieving, by executing an instruction with processor circuitry, binary bounding volume hierarchy (BVH) trees, respective ones of the binary BVH trees including BVH nodes having spatial information associated with a surface,
• identifying, by executing an instruction with the processor circuitry, a computation capability value associated with the FPGA resources;
• building, by executing an instruction with the processor circuitry, a first k-ary tree having a number of k-ary nodes equal to the computation capability value;
• and
• an FPGA memory controller to initiate, by executing an instruction with the processor circuitry, collision computation corresponding to an object by transferring the first k-ary tree to a first memory of the FPGA resources.

One or more non-transitory machine-readable storage media comprising machine-readable instructions that, when executed, cause one or more processors to, at least:

• retrieve binary bounding volume hierarchy (BVH) trees, respective ones of the binary BVH trees including BVH nodes having spatial information associated with a surface;
• identify a computation capability value associated with FPGA resources;
• build a first k-ary tree having a number of k-ary nodes equal to the computation capability value;
• and
• initiate collision computation corresponding to an object by transferring the first k-ary tree to a first memory of the FPGA resources.