Delay circuit

A delay circuit, comprising:

• an input module, configured to receive a target input signal and output the target input signal to a first node, the target input signal being a rising edge signal or a falling edge signal of a pulse signal;
• an output module, configured to output a target output signal, the target output signal being a delayed signal of the target input signal;
• a delay control module, connected to the input module through the first node, and connected to the output module through a second node, the delay control module comprising at least one delay capacitor unit, and the delay control module being configured to control the at least one delay capacitor unit to connect to the first node within a rising edge delay duration or a falling edge delay duration, and control the at least one delay capacitor unit to disconnect from the first node outside the rising edge delay duration or the falling edge delay duration;
• wherein the rising edge delay duration is a delay duration between a rising edge of the target output signal and a rising edge of the target input signal, and the falling edge delay duration is a delay duration between a falling edge of the target output signal and a falling edge of the target input signal.