Neural network apparatus and method of processing variable-resolution operation by the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSungho Kim, Cheheung Kim, Jaeho Lee
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Abstract
A neural network apparatus that is configured to process an operation includes neural network circuitry configured to receive a first input of an n-bit activation, store a second input of an m-bit weight, perform a determination whether to perform an operation on an ith bit of the first input and a jth bit of the second input, output an operation value of an operation performed on the ith bit of the first input and the jth bit of the second input based on the determination, and produce an operation value of the operation based on the determination.
Claims18
A neural network apparatus that processes an operation, the neural network apparatus comprising:
- neural network circuitry configured to,
- map i and j such that an ith bit of an n-bit activation and a jth bit of an m-bit weight are differently combined for respective instances of performing the operation, wherein n is a natural number and i is a natural number between 1 and n inclusive, and wherein m is a natural number and j is a natural number between 1 and m inclusive;
- receive, for each of the respective instances, a first input corresponding to the ith bit of the n-bit activation;
- store, for each of the respective instances, a second input corresponding the ith bit of the m-bit weight;
- perform, for each of the respective instances, a determination whether the operation is to be performed on the ith bit and the jth bit;
- and
- based on the determination being a positive determination,
- perform the operation on the ith bit and the jth bit, and
- produce each bit of an operation value of the operation performed on the ith bit and the jth bit based on the determination.
A method of processing an operation by a neural network apparatus, the method comprising:
- determining a first input corresponding to an ith bit of an n-bit activation, and a second input corresponding to a jth bit of an m-bit weight;
- performing a determination whether the operation is to be performed on the first input and the second input, and produce a positive determination or a negative determination as a result of the determination;
- and
- performing the operation on the first input and the second input to produce an operation value of the operation based on the positive determination,
- wherein n and m are natural numbers, i is a natural number between 1 and n inclusive, and j is a natural number between 1 and m inclusive, and
- wherein producing the first input and the second input includes mapping i and j such that the ith bit and the jth bit are differently combined for respective instances of the operation.
Dependencies are inferred from the claim text.