Methods and apparatus to simulate metastability for circuit design verification
AssigneeTexas Instmments Incorporated
InventorsSudhakar Surendran, Venkatraman Ramakrishnan
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Abstract
Methods, apparatus, systems and articles of manufacture are disclosed to simulate metastability for circuit design verification. An example apparatus includes an input handler to receive circuit design data indicative of a circuit design, a circuit modeler to generate a simulation model based on the circuit design data, a simulator to simulate operation of the circuit design based on the simulation model, a metastability injector to insert metastability logic into the simulation model during the simulation, and a metastability controller to control the metastability logic during the simulation.
Claims20
An apparatus comprising:
- an input handler to receive circuit design data indicative of a circuit design;
- a circuit modeler to generate a simulation model based on the circuit design data;
- a simulator to simulate operation of the circuit design based on the simulation model;
- a metastability injector to insert metastability logic that includes a synchronizer that includes a set of parallel delay paths into the simulation model during the simulation;
- and
- a metastability controller to control the metastability logic during the simulation.
A method comprising:
- receiving circuit design data indicative of a circuit design;
- generating a simulation model based on the circuit design data;
- inserting metastability logic into the simulation model during the simulation, wherein the metastability logic includes a set of delay paths, each having a different delay;
- and
- simulating operation of the circuit design based on the simulation model that includes the metastability logic.
A non-transitory computer readable medium comprising instructions that, when executed by at least one processor of a computing system, cause the computing system to at least:
- receive circuit design data indicative of a circuit design;
- generate a simulation model based on the circuit design data;
- insert metastability logic into the simulation model, wherein the metastability logic includes a set of selectable delay paths;
- and
- simulate operation of the circuit design based on the simulation model including the metastability logic.
Dependencies are inferred from the claim text.