Voltage drop analysis using local circuit representation
AssigneeAnsys, Inc.
InventorsAltan Odabasi, Emrah Acar, Sudarsana Reddy Mallu, Tinu Thomas, Mirza Milan, Scott Johnson, Joao Geada, Youlin Liao
Life of this patent
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Abstract
Methods, systems and media for simulating or analyzing voltage drops in a power distribution network can use an iterative approach to define a portion of a design around a victim to capture a sufficient collection of aggressors that cause appreciable voltage drop on the victim. This approach can be both computationally efficient and accurate and can limit the size of the data used in simulating dynamic voltage drops in the power distribution network.
Claims21
A non-transitory machine readable medium storing executable program instructions which when executed by a data processing system cause the data processing system to perform a method, the method comprising:
- selecting a first logic element in a design of an electrical circuit, the first logic element directly coupled to a first power supply node that is affected by a set of logic elements that represent aggressors that cause a voltage drop on the first power supply node;
- selecting a first region in the design, the first region being a portion of the design, and the first region encompassing the first logic element and at least a portion of the set of logic elements and a power delivery network, which includes the first power supply node, in the first region;
- computing, for each logic element in the at least a portion of the set of logic elements, a voltage drop at the first power supply node caused by each logic element in the set of logic elements;
- determining, through an examination of voltage drop values at a periphery of the first region, whether the first region captures a sufficient set of aggressors that cause a voltage drop at the first power supply node;
- enlarging the first region to create a second region in the design in response to determining the first region does not capture a sufficient set of aggressors, the second region being a portion of the design and encompassing the first logic element and at least the portion of the set of logic elements.
A machine implemented method comprising:
- selecting a first logic element in a design of an electrical circuit, the first logic element directly coupled to a first power supply node that is affected by a set of logic elements that represent aggressors that cause a voltage drop on the first power supply node;
- selecting a first region in the design, the first region being a portion of the design, and the first region encompassing the first logic element and at least a portion of the set of logic elements and a power delivery network, which includes the first power supply node, in the first region;
- computing, for each logic element in the at least a portion of the set of logic elements, a voltage drop at the first power supply node caused by each logic element in the set of logic elements;
- determining, through an examination of voltage drop values at a periphery of the first region, whether the first region captures a sufficient set of aggressors that cause a voltage drop at the first power supply node;
- enlarging the first region to create a second region in response to determining the first region does not capture a sufficient set of aggressors, the second region being a portion of the design and encompassing the first logic element and at least the portion of the set of logic elements.
Dependencies are inferred from the claim text.