Computation of neural network node with large input values

A neural network inference circuit that executes a neural network comprising a plurality of computation nodes, each of a set of the computation nodes comprising a dot product of input values and ternary weight values, the neural network inference circuit comprising:

• a set of memory control circuits to load (i) data for a set of ternary weight values for a computation node into a set of weight value buffers, (ii) a first set of bits of each input value of a set of input values for the computation node into a first set of input value buffers, and (iii) a second set of bits of each of the input values into a second set of input value buffers;
• a set of dot product computation circuits to (i) compute a first dot product of the set of ternary weight values and the first set of bits of each of the input values and (ii) compute a second dot product of the set of ternary weight values and the second set of bits of each of the input values;
• a bit shift circuit to shift the second dot product by a particular number of bits;
• and
• an adder circuit to add the first dot product with the bit-shifted second dot product to compute a dot product for the computation node.

A non-transitory machine-readable medium storing a program, for execution by at least one processing unit, that configures a neural network inference circuit that executes a neural network comprising a plurality of computation nodes, each of a set of the computation nodes comprising a dot product of input values and ternary weight values, the program comprising sets of instructions for:

• configuring a set of memory control circuits to load (i) data for a set of ternary weight values for a computation node into a set of weight value buffers, (ii) a first set of bits of each input value of a set of input values for the computation node into a first set of input value buffers, and (iii) a second set of bits of each of the input values into a second set of input value buffers;
• configuring a set of dot product computation circuits to (i) compute a first dot product of the set of ternary weight values and the first set of bits of each of the input values and (ii) compute a second dot product of the set of ternary weight values and the second set of bits of each of the input values;
• configuring a bit shift circuit to shift the second dot product by a particular number of bits;
• and
• configuring an adder circuit to add the first dot product with the bit-shifted second dot product to compute the dot product for the computation node.