Memory controller, memory system and operating method of the memory system for scheduling data access across channels of memory chips within the memory system

A memory system comprising:

• a memory device including a plurality of memory chips;
• a memory controller located external to the plurality of memory chips and configured to control an operation of the memory device;
• and a plurality of channels configured to connect each of the plurality of memory chips to the memory controller,
• wherein the memory controller is configured to determine a first number of memory chips of the plurality of memory chips allowed to operate in parallel for each of a plurality of operation statuses based on information about power consumption of a memory chip among the memory chips, obtain information indicating a second number of memory chips of the plurality of memory chips having one of the operation statuses from an operation status of each of the plurality of memory chips, and schedule data access across the plurality of channels, based on a parameter indicating the first number and the information indicating the second number.

An operating method of a memory system including a memory device including a plurality of memory chips, the operating method comprising:

• setting a parameter indicating a number of memory chips of the plurality of memory chips allowed to operate in parallel for each of a plurality of operation statuses, based on information about power consumption of each of the plurality of operation statuses of a memory chip among the memory chips;
• obtaining information about an operation status of each of the plurality of memory chips;
• and
• scheduling data access across a plurality of channels corresponding to the plurality of memory chips, based on the parameter and the information about the operation status of each of the plurality of memory chips,
• wherein the setting of the parameter comprises setting a parameter table including the parameter that indicates the number of memory chips allowed to operate in parallel for each of the plurality of operation statuses within each of a plurality of temperature ranges, the parameter table being set for each of the plurality of temperature ranges.