Error signaling windows for phase-differential protocols

A data communication apparatus, comprising:

• a bus interface configured to couple the data communication apparatus to a serial bus;
• a phase-differential decoder configured to decode data from transitions between pairs of symbols in a sequence of symbols received from the serial bus, each symbol being representative of signaling state of the serial bus;
• and
• a processor configured to:
• detect an indicator of an error signaling window in signaling state of two wires of the serial bus when a first wire of the two wires of the serial bus is toggled after each of three or more symbol intervals while a second wire of the two wires of the serial bus is maintained in a first signaling state, wherein indicators of the error signaling window comprise a prohibited combination of symbols or a delay in control signaling;
• detect a synchronizing pattern when the first wire of the two wires of the serial bus is toggled after each of three or more symbol intervals while the second wire of the two wires of the serial bus is maintained in a second signaling state;
• and
• signal an error through the bus interface during the error signaling window when the error is detected in the sequence of symbols or in timing of the indicators of the error signaling window.

A method for transmitting data from a device coupled to a serial bus, comprising:

• encoding the data in transitions between pairs of symbols in a sequence of symbols, each symbol defining signaling state of the serial bus;
• transmitting the sequence of symbols over the serial bus;
• transmitting an indicator of an error signaling window in signaling state of two wires of the serial bus by toggling a first wire of the two wires of the serial bus after each of three or more symbol intervals while maintaining a second wire of the two wires of the serial bus in a first signaling state, wherein the first wire of the two wires of the serial bus is toggled after each of three or more symbol intervals while the second wire of the two wires of the serial bus is maintained in a second signaling state when a synchronizing pattern is transmitted over the serial bus, and wherein indicators of the error signaling window correspond to a prohibited combination of symbols or a delay in control signaling;
• receiving signaling in the error signaling window indicating an error in the sequence of symbols or an error in timing of the indicators of the error signaling window;
• and
• terminating transmission of the data when the signaling indicating the error is received in the error signaling window.

A data communication apparatus, comprising:

• a bus interface configured to couple the data communication apparatus to a serial bus;
• a phase-differential encoder configured to encode data in transitions between pairs of symbols in a sequence of symbols, each symbol defining signaling state of the serial bus;
• and
• a processor configured to:
• transmit an indicator of an error signaling window in signaling state of two wires of the serial bus by toggling a first wire of the two wires of the serial bus after each of three or more symbol intervals while maintaining a second wire of the two wires of the serial bus in a first signaling state, wherein the first wire of the two wires of the serial bus is toggled after each of three or more symbol intervals while the second wire of the two wires of the serial bus is maintained in a second signaling state when a synchronizing pattern is transmitted over the serial bus, and wherein indicators of the error signaling window comprise a prohibited combination of symbols or a delay in control signaling;
• receive signaling in the error signaling window indicating an error in the sequence of symbols or an error in timing of the indicators of the error signaling window;
• and
• terminate transmission of the data when the signaling indicating the error is received in the error signaling window.