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US 11,531,552 B2Granted
Executing multiple programs simultaneously on a processor core
AssigneeMicrosoft Technology Licensing, LLC
InventorsGagan Gupta, Douglas C. Burger
Life of this patent
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AssigneeMicrosoft Technology Licensing, LLC
InventorsGagan Gupta, Douglas C. Burger
Estimating the term…
Systems and methods are disclosed for allocating resources to contexts in block-based processor architectures. In one example of the disclosed technology, a processor is configured to spatially allocate resources between multiple contexts being executed by the processor, including caches, functional units, and register files. In a second example of the disclosed technology, a processor is configured to temporally allocate resources between multiple contexts, for example, on a clock cycle basis, including caches, register files, and branch predictors. Each context is guaranteed access to its allocated resources to avoid starvation from contexts competing for resources of the processor. A results buffer can be used for folding larger instruction blocks into portions that can be mapped to smaller-sized instruction windows. The results buffer stores operand results that can be passed to subsequent portions of an instruction block.
A processor configurable to spatially allocate a first set of execution resources and a second set of execution resources according to two or more modes, the modes comprising:
A processor comprising:
A method of operating a processor, the method comprising:
Dependencies are inferred from the claim text.