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US 11,531,542 B2Granted
Addition instructions with independent carry chains
AssigneeIntel Corporation
InventorsVinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk, Martin G. Dixon, Sean P. Mirkes, Matthew C. Merten, Tong Li, Bret L. Toll
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Abstract
A number of addition instructions are provided that have no data dependency between each other. A first addition instruction stores its carry output in a first flag of a flags register without modifying a second flag in the flags register. A second addition instruction stores its carry output in the second flag of the flags register without modifying the first flag in the flags register.
Claims18
An apparatus comprising:
- hardware decoder circuitry to decode an instruction, the instruction to identify a location of a first operand and to identify a location of a second operand;
- and
- execution circuitry to execute the decoded instruction to perform an unsigned addition of the first operand, the second operand, and an overflow flag to generate a result, and store the result.
A method comprising:
- decoding an instruction, the instruction to identify a location of a first operand and to identify a location of a second operand;
- and
- executing the decoded instruction to perform an unsigned addition of the first operand, the second operand, and an overflow flag to generate a result, and store the result.
A system comprising:
- a memory to store an instruction;
- and
- a processor coupled to the memory, the processor comprising:
- hardware decoder circuitry to decode the instruction, the instruction to identify a location of a first operand and to identify a location of a second operand, and
- execution circuitry to execute the decoded instruction to perform an unsigned addition of the first operand, the second operand, and an overflow flag to generate a result, and store the result.
2 more elements
Dependencies are inferred from the claim text.