Integrated circuit with clock gapping

A system comprising:

• a first block of an integrated circuit;
• a second block of the integrated circuit;
• and
• a hardware processor configured to:
• determine a first clock gap for the first block based on a performance factor of the first block or an external factor;
• adjust a clock signal to the first block based on the first clock gap;
• determine a second clock gap for the second block based on (i) the first clock gap and (ii) a performance factor of the second block or the external factor, the second clock gap is different from the first clock gap;
• and
• adjust the clock signal to the second block based on the second clock gap.

An integrated circuit comprising:

• a synchronous block comprising a first circuit block and a second circuit block;
• and
• a controller configured to:
• determine a first clock gap for the first circuit block based on a performance factor of the first circuit block or an external factor;
• adjust a clock signal to the first circuit block based on the first clock gap;
• determine a second clock gap for the second circuit block based on (i) the first clock gap and (ii) a performance factor of the second circuit block or the external factor, the second clock gap is different from the first clock gap;
• and
• adjust the clock signal to the second circuit block based on the second clock gap.