US 11,522,053 B2Granted

LDMOS with self-aligned body and hybrid source

AssigneesAmplexia, LLC, X-FAB Global Services GmbH

InventorsBrendan Toner, Zhengchao Liu, Gary M. Dolny, William R. Richards, Manoj Chandrika Reghunathan, Stefan Eisenbrandt, Christoph Ellmers

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Abstract

Devices and methods for providing a power transistor structure with a shallow source region include implanting a dopant of a first dopant polarity into a drift region on a source side of a gate structure to form a body region, the body region being self-aligned to, and extending under, the gate structure, and producing a shallow body region wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region and suppresses triggering of a parasitic bipolar. A retrograde body well, of the first dopant polarity, may be disposed beneath, and noncontiguous with, the shallow self-aligned body region, wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region. A variety of power transistor structures are produced from such devices and methods.

Claims24

Dependent claims

A power transistor structure, comprising:

(a) a substrate, of a first dopant polarity;
(b) a drift region, of a second dopant polarity;
(c) a gate structure extending over a portion of the drift region, the gate structure having a source side and a drain side, wherein the gate structure includes a polysilicon on a gate oxide;
(d) a drain region on or within the drift region;
(e) a shallow body region, of a first dopant polarity, on the source side of the gate structure, the body region having a depth that is less than a thickness of the polysilicon, and the shallow body region being self-aligned to, and extending under, the gate structure;
(f) a source region on or within the shallow self-aligned body region;
(g) a hybrid contact implant, of the second dopant polarity, in the source region, the hybrid contact implant being aligned to the gate structure;
(h) a channel region, beneath the gate structure, whose length is defined by the distance the shallow self-aligned body region extends laterally beneath the gate structure;
(i) a respective metal contact on or within each of the source region, the gate structure, and the drain region;
(j) wherein the hybrid contact implant and the metal contact that is on or within the source region combine to form a hybrid contact that defines first, second, and third electrical junctions, wherein the first electrical junction is a Schottky junction formed vertically between the source metal contact and the shallow self-aligned body region, wherein the second electrical junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant, and wherein the third electrical junction is a rectifying PN junction between the hybrid contact implant and the channel region;
(k) wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region, thereby enabling higher operating voltage and reduced channel length;
and
(l) wherein the source side hybrid contact suppresses triggering of a parasitic bipolar, thereby enhancing at least one of (i) electrostatic discharge (ESD) robustness and (ii) safe operating area.

10 more elements

A power transistor structure of at least two fingers (gates), comprising:

(a) a substrate, of a first dopant polarity;
(b) a drift region, of a second dopant polarity;
(c) first and second gate structures, each extending over a respective portion of the drift region, each gate structure having a source side and a drain side, wherein each gate structure includes a polysilicon on a gate oxide;
(d) a pair of drain regions on or within the drift region;
(e) a shallow body region, of a first dopant polarity, on the source side of the respective gate structures, the body region having a depth that is less than a thickness of the polysilicon, and the shallow body region being self-aligned to, and extending under, the gate structure;
(f) a source region on or within the shallow self-aligned body region;
(g) a body tap, of the first dopant polarity, diffused into the shallow self-aligned body region and abutting the source region;
(h) a retrograde body well, of the first dopant polarity, disposed beneath, and noncontiguous with, the shallow self-aligned body region, and wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region;
(i) a pair of channel regions, each beneath a respective gate structure, each of whose length is defined by the distance the shallow self-aligned body region extends laterally beneath the respective gate structure;
(j) a respective metal contact on or within each of the source region, the gate structures, and the drain regions;
and
(k) a source/body contact adapted to connect the metal contact on or within the source region to a first metal interconnect layer, the source/body contact having a length;
(l) wherein the retrograde body well manipulates high electric fields at least one corner of the shallow self-aligned body region, thereby enhancing leakage current and breakdown voltage without impacting the respective channel region.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/541,592Filed 3 Dec 2021 · us provisional application
Priority: 4 Dec 2020
Published: US 2022/0181444 A19 Jun 2022
Granted: 6 Dec 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification29 codes

H10D 30/603
Having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs: having asymmetry in the channel direction, e.g. lateral…
H10D 62/378
Of igfets: contact regions to the substrate regions
H10D 30/0212
Of FETs having insulated gates [IGFET]: using self-aligned silicidation
H10D 30/023
Of FETs having insulated gates [IGFET]: having multiple independently-addressable gate electrodes influencing the same channel