Test circuit

A test circuit for testing an integrated circuit, wherein the integrated circuit comprises a black box circuit and a plurality of combinational logic circuits, and the test circuit comprises:

• a plurality of normal flip flops, wherein the normal flip flops each comprises a first clock pin, a first input pin, a second input pin and a first output pin and is configured to temporarily store an input value of the first input pin or an input value of the second input pin according to a scan enable signal;
• and
• a modified flip flop comprising a second clock pin, a third input pin, a fourth input pin and a second output pin and configured to temporarily store an input value of the third input pin or an input value of the fourth input pin according to a scan test mode signal, wherein the third input pin is coupled to the black box circuit, the fourth input pin is coupled to one of the normal flip flops, and the second output pin is coupled to another one of the normal flip flops and one of the combinational logic circuits.