Equalizer and transmitter including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsGun-Il Kang, June-Hee Lee, Byung-Wook Cho
Life of this patent
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Abstract
An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.
Claims20
An equalizer comprising:
- a shift register configured to provide a symbol sequence extracted from serial data;
- a plurality of first registers configured to receive the symbol sequence and generate an equalized digital signal corresponding to the symbol sequence;
- a plurality of second registers configured to store a value provided from outside the equalizer, wherein an output of the plurality of second registers is directly connected to the plurality of first registers;
- a filter controller configured to control the plurality of second registers to output a value and further configured to control the plurality of first registers to store a value provided by the plurality of second registers;
- and
- a digital-to-analog converter configured to convert the equalized digital signal into an equalized signal.
A transmitter for transmitting input data through a channel, the transmitter comprising:
- a serializer configured to generate serial data from the input data;
- an equalizer comprising:
- a finite impulse response (FIR) filter block configured to use a lookup table that outputs a digital signal corresponding to a symbol sequence extracted from the serial data, and
- a digital-to-analog converter configured to output an equalized signal by converting the digital signal;
- and
- a driver configured to amplify the equalized signal, wherein:
- the FIR filter block is configured to:
- refresh the lookup table based on channel information received through the channel, and
- adjust previously-applied offsets if a variation of a filter coefficient corresponds to a reset of the filter coefficient.
An equalizer comprising:
- a shift register configured to extract a sequence of symbols from serial data;
- a digital equalizer circuit configured to generate a digital signal, corresponding to the sequence of symbols, that is equalized to compensate for a characteristic of a communication channel;
- and
- a digital to analog converter configured to convert the digital signal into an analog signal, wherein:
- the digital equalizer circuit is configured to:
- change a value of the digital signal by an amount determined by a first symbol within the sequence of symbols and a coefficient of equalization corresponding to the first symbol,
- increase the value of the digital signal by the amount determined by the first symbol in response to determining the characteristic meets a first criterion, and
- decrease the value of the digital signal by the amount determined by the first symbol in response to determining the characteristic does not meet the first criterion.
Dependencies are inferred from the claim text.