Two-bit magnetoresistive random-access memory cell
AssigneeInternational Business Machines Corporation
InventorsKarthik Yogendra, Eric Raymond Evarts
Life of this patent
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Abstract
Provided is a magnetoresistive random-access memory (MRAM) cell. The MRAM cell comprises a first heavy metal layer and a first magnetic tunnel junctions (MTJ) coupled to the first heavy metal layer. The first MTJ has a first area. The MRAM cell further comprises a second MTJ. The second MTJ is connected in series with the first MTJ, and the second MTJ has a second area that is different than the first area. The second MTJ shared a reference layer with the first MTJ. The MRAM cell further comprises a second heavy metal layer that is coupled to the second MTJ.
Claims22
A two-bit spin orbit torque (SOT) magnetoresistive random-access memory (MRAM) cell, the MRAM cell comprising:
- a first heavy metal layer;
- a first magnetic tunnel junction (MTJ) coupled to the first heavy metal layer, wherein the first MTJ has a first cross-sectional area;
- a second MTJ connected in series with the first MTJ, wherein the second MTJ has a second cross-sectional area that is different than the first cross-sectional area, wherein the second MTJ shares a reference layer with the first MTJ;
- and
- a second heavy metal layer coupled to the second MTJ, wherein:
- the first heavy metal layer is connected to a first word line and to a bit line through a first transistor;
- the second heavy metal layer is connected to a second word line and to the bit line through a second transistor;
- the first heavy metal layer is connected to a third word line and to a source line through a third transistor;
- and
- the second heavy metal layer is connected directly to the source line.
A method of forming a two-bit spin orbit torque (SOT) MRAM cell, the method comprising:
- forming a second heavy metal layer;
- forming a magnetic tunnel junction (MTJ) stack that comprises:
- a second MTJ above the second heavy metal layer, the second MTJ having a second cross-sectional area;
- and
- a first MTJ in series with the second MTJ, the first MTJ having a first cross-sectional area, wherein the first cross-sectional area is different than the second cross-sectional area, and wherein the first MTJ shares a reference layer with the second MTJ;
- and
- forming a first heavy metal layer above the first MTJ, wherein:
- the first heavy metal layer is connected to a first word line and to a bit line through a first transistor;
- the second heavy metal layer is connected to a second word line and to the bit line through a second transistor;
- the first heavy metal layer is connected to a third word line and to a source line through a third transistor;
- and
- the second heavy metal layer is connected directly to the source line.
A method of programming a two-bit MRAM cell, the method comprising:
- receiving a write command to program a first bit in a two-bit MRAM cell that comprises a first magnetic tunnel junction (MTJ) in series with a second MTJ, wherein:
- an area of the first MTJ is different than an area of the second MTJ;
- the first MTJ is coupled to a first heavy metal layer;
- the first heavy metal layer is connected to a bit line using a first transistor;
- the first heavy metal layer is connected to a source line using a second transistor;
- the second MTJ is connected to a second heavy metal layer;
- the second heavy metal layer is connected to the bit line using a third transistor;
- and
- the second heavy metal layer is directly connected to the source line;
- determining that the first bit is to be stored in a particular MTJ, wherein the particular MTJ is one of the first MTJ or the second MTJ;
- and
- selectively activating one or more of the first, second, and third transistors to cause current to flow through a heavy metal layer that is associated with the particular MTJ.
A system for programming a two-bit MRAM cell, wherein the system comprises:
- an MRAM cell comprising a first magnetic tunnel junction (MTJ) in series with a second MTJ, wherein:
- an area of the first MTJ is different than an area of the second MTJ;
- the first MTJ is coupled to a first heavy metal layer;
- the first heavy metal layer is connected to a bit line using a first transistor;
- the first heavy metal layer is connected to a source line using a second transistor;
- the second MTJ is connected to a second heavy metal layer;
- the second heavy metal layer is connected to the bit line using a third transistor;
- and
- the second heavy metal layer is directly connected to the source line;
- and
- a processor configured to perform a method comprising:
- receiving a write command to program a first bit in the MRAM cell;
- determining that the first bit is to be stored in a particular MTJ, wherein the particular MTJ is one of the first MTJ or the second MTJ;
- and
- selectively activating one or more of the first, second, and third transistors to cause current to flow through a heavy metal layer that is associated with the particular MTJ.
Dependencies are inferred from the claim text.