Synaptic resistors for concurrent parallel signal processing, memory and learning with high speed and energy efficiency
AssigneeThe Regents of the University of California
InventorYong Chen
Life of this patent
Estimating the term…
Abstract
Synaptic resistors (synstors), and their method of manufacture and integration into exemplary circuits are provided. Synstors are configured to emulate the analog signal processing, learning, and memory functions of synapses. Circuits incorporating synstors are capable of performing signal processing and learning concurrently in parallel analog mode with speed, energy efficiency, and functions superior to computers.
Claims21
A synstor, capable of providing analog signal processing, memory and learning functions of synapse, comprising:
- an input electrode and an output electrode;
- a semiconducting channel connected between the input and output electrodes;
- at least one dielectric layer disposed adjacent to the semiconducting channel, the dielectric layer disposed adjacent to at least one side of the channel;
- a reference electrode disposed adjacent to the dielectric layer;
- and
- a charge storage material disposed within a portion of the dielectric layer;
- wherein at least a portion of the dielectric layer is disposed between the charge storage material and the semiconducting channel such that a voltage difference between the channel and the charge storage material must have a magnitude above a threshold value to drive charge through the at least one dielectric layer to the charge storage material to alter a net charge within the charge storage material in an analog mode;
- wherein a combination of the input and output electrodes and the semiconducting channel between form at least one resistor, and the combination of the semiconducting channel, the dielectric layer, the charge storage material, and the reference electrode form at least one capacitor;
- wherein the synstor is configured to apply a zero or a constant voltage to the reference electrode, and when no voltage signals are applied on the input and output electrodes, a standby zero voltage or a standby constant voltage is applied on the input and output electrodes;
- and
- wherein the synstor is further configured such that at least one set of voltage signals may be applied on the input and output electrodes with respect to the standby voltage such that:
- when a set of input voltage signals is applied on the input electrode and wherein no voltage signal is applied on the output electrode, the set of input voltage signals induce an output current on the output electrode through the at least one resistor and charges the at least one capacitor such that, after the set of input voltage signals end, the charge in the at least one capacitor is discharged and induces an output current on the output electrode, and wherein the output current may last after the set of input voltage signals ends,
- when a set of voltage signals is applied on the input electrode and wherein a set of voltage signals with a same or similar amplitude as the set of the input voltage signals is applied to the output electrode simultaneously, the magnitude of the voltage difference between the channel and the charge storage material produced thereby is above the threshold value, charge is driven through the portion of the dielectric layer disposed between the channel and the charge storage material to modify the net charge within the charge storage material and a conductance of the synstor in an analog mode for learning,
- when a set of voltage signals is applied to one of either the input or the output electrode and wherein no voltage signal or a set of voltage signals with an opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, the magnitude of the voltage difference between the channel and the charge storage material produced thereby falls below the threshold value such that charge is not driven through the portion of the dielectric layer disposed between the channel and the charge storage material such that the net charge in the charge storage material remains unchanged and the conductance of the synstor remains unchanged for learning, and
- when a set of voltage signals is applied to one of either the input or the output electrode with respect to the standby voltage and wherein no voltage signal or a set of voltage signals with the opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, or when no external voltages is applied to either the input or the output or the reference electrode, the conductance of the synstor remains unchanged as memory.
A synstor capable of providing analog signal processing, memory and learning functions of biological synapse, comprising:
- a body connected with an input electrode, an output electrode, and a reference electrode;
- wherein the synstor is configured to apply a zero or a constant voltage to the reference electrode, and when no sets of voltage signals are applied on the input and output electrodes, a standby zero voltage or a standby constant voltage is applied on the input and output electrodes;
- and
- wherein the synstor is configured such that sets of voltage signals may be applied on the input and output electrodes with respect to the standby voltage such that:
- when a set of input voltage signals is applied on the input electrode with respect to the standby voltage and wherein no voltage signal is applied on the output electrode, the set of the input voltage signals induces a dynamic output current on the output electrode for signal processing,
- when a set of voltage signals is applied on the input electrode and wherein a set of voltage signals with at least one same or similar amplitude as the set of the input voltage signals is applied to the output electrode simultaneously, a conductance of the synstor is changed in analog mode;
- when a set of voltage signals is applied to one of either the input or the output electrode and wherein no voltage signal or a set of voltage signals with an opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, the conductance of the synstor remains unchanged for learning, and
- when a set of voltage signals is applied to one of either the input or the output electrode with respect to the standby voltage and wherein no voltage signal or a set of voltage signals with the opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, or when no external voltages is applied to either the input or the output or the reference electrode, the conductance of the synstor remains unchanged as memory.
A synaptic circuit capable of providing analog signal processing, memory and learning functions comprising:
- a plurality of synstors, each in turn comprising a body connected with an input electrode, an output electrode, and a reference electrode;
- wherein each synstor is configured to apply a zero or a constant voltage to the reference electrode, and when no sets of voltage signals are applied on the input and output electrodes, a standby zero voltage or a standby constant voltage is applied on the input and output electrodes;
- and
- wherein each synstor is configured such that sets of voltage signals may be applied on the input and output electrodes with respect to the standby voltage, thereof such that:
- when a set of input voltage signals is applied on the input electrode with respect to the standby voltage and wherein no voltage signal is applied on the output electrode, the set of the input voltage signals induces a dynamic output current on the output electrode for signal processing,
- when a set of voltage signals is applied on the input electrode and wherein a set of voltage signals with at least one same or similar amplitude as the set of the input voltage signals is applied to the output electrode simultaneously, a conductance of the synstor is changed in analog mode;
- when a set of voltage signals is applied to one of either the input or the output electrode and wherein no voltage signal or a set of voltage signals with an opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, the conductance of the synstor remains unchanged for learning, and
- when a set of voltage signals is applied to one of either the input or the output electrode with respect to the standby voltage and wherein no voltage signal or a set of voltage signals with the opposite polarity is applied to the other of either the input or output electrode simultaneously, or when no voltage signals is applied to either the input or the output electrode, or when no external voltages is applied to either the input or the output or the reference electrode, the conductance of the synstor remains unchanged as memory;
- and
- wherein each of the plurality of synstors is a component of a circuit comprising an M×N network of said synstors connected with M input electrodes and N output electrodes such that each input electrode is connected with multiple output electrodes by one or more synstors such that a set of voltage signals applied on the M input electrodes induces dynamic output currents via synstors flowing to the N output electrodes in analog parallel mode for signal processing, wherein the dynamic output currents on the N output electrodes define a current vector which is equal to a convolution of kernel functions and a product of a synstor conductance matrix and the vector of the input voltage signals on the M input electrodes;
- wherein the circuit is configured such that when a set of voltage signals is applied on the M input electrodes and a set of voltage signals is applied on the N output electrodes, concurrently the synstor conductance matrix is modified in an analog parallel mode for learning, wherein a modification rate of the synstor conductance matrix is proportional to an outer product between the vectors of input and output voltage signals;
- and
- wherein concurrently, the circuit is configured to process the voltage signals on the input electrodes and is modified by the voltage signals on the input and output electrodes.
Dependencies are inferred from the claim text.