System and method to enhance noise performance in a delta sigma converter
AssigneeAnalog Devices, Inc.
InventorsPreston S. Birdsong, Abhishek Bandyopadhyay, Adam R. Spirer
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Abstract
Systems and methods for a power-efficient 3-level digital-to-analog converter. A converter cell using a current starving technique keeps a portion of the converter cell turned on in a low power mode, as opposed to completely turning off current in selected modes. A conversion system keeps a first set of converters active while allowing a second set of converters to be powered down. Systems and methods presented save power and allow for efficient reactivation of converters.
Claims20
A 3-level digital-to-analog converter (DAC), comprising:
- a plurality of current sources each having a current flow, wherein the plurality of current sources includes a first subset of current sources and a second subset of current sources;
- a first positive current path for the first subset of current sources, wherein the first positive current path includes a first switch;
- a first negative current path for the first subset of current sources, wherein the first negative current path includes a second switch;
- a zero-state current path for a first portion of the first subset of current sources, wherein the zero-state current path is a dump path, and wherein the zero-state current path includes a third switch;
- and
- a bypass current path for a second portion of the first subset of current sources, wherein the zero-state current path includes a fourth switch, wherein the fourth switch is closed when the third switch is closed, and wherein the bypass current path is configured to shunt the second portion of the first subset of current sources from the dump path, thereby keeping the DAC powered on.
A system for converting a digital signal to an analog signal, comprising
- an input signal;
- a first plurality of digital-to-analog converter (DAC) cells coupled to the input signal, wherein the first plurality of DAC cells remain powered on;
- a second plurality of DAC cells, wherein ones of the second plurality of DAC cells are configured to be powered down when the input signal is below a selected threshold;
- a charge amplifier configured to provide charge to powered down DAC cells of the second plurality of DAC cells;
- and
- a multiplexor, coupled to the charge amplifier and the second plurality of DAC cells, wherein, when the input signal rises above the selected threshold, the multiplexor is configured to connect the charge amplifier charge to powered down DAC cells of the second plurality of DAC cells, wherein the charge amplifier charge powers up the powered down DAC cells of the second plurality of DAC cells.
A method for digital-to-analog conversion, comprising:
- receiving a plurality of input current flows, wherein the plurality of input current flows includes a first subset of input current flows and a second subset of input current flows;
- and
- selecting one of a plurality of current paths, wherein:
- selecting a first positive current path of the plurality of current paths comprises closing a first switch;
- selecting a first negative current path of the plurality of current paths comprises closing a second switch;
- selecting a zero-state current path of the plurality of current paths comprises:
- closing a third switch causing a first portion of the first subset of input current flows to follow a dump path, and closing a fourth switch shunting a second portion of the first subset of input current flows from the dump path, thereby keeping the DAC powered on.
Dependencies are inferred from the claim text.