High electron mobility transistor with trench isolation structure capable of applying stress and method of manufacturing the same

A method of fabricating high electron mobility transistor, comprising:

• providing a substrate with active areas;
• forming a buffer layer, a channel layer and a barrier layer sequentially on said substrate, and forming gate, source and drain on said barrier layer;
• forming a trench surrounding said channel layer and said barrier layer;
• and
• forming a trench isolation structure in said trench, wherein said trench isolation structure applies stress on said channel layer and said barrier layer and modify two-dimension electron gas (2DEG) or two-dimension hole gas (2DHG) of said high electron mobility transistor, wherein said high electron mobility transistor is n-type high electron mobility transistor, and said stress applied by said trench isolation structure is tensile stress, and an area of said active area at said source is smaller than an area of said active area at said gate and is smaller than an area of said active area at said drain.

A method of fabricating high electron mobility transistor, comprising:

• providing a substrate with active areas;
• forming a buffer layer, a channel layer and a barrier layer sequentially on said substrate, and forming gate, source and drain on said barrier layer;
• forming a trench surrounding said channel layer and said barrier layer;
• and
• forming a trench isolation structure in said trench, wherein said trench isolation structure applies stress on said channel layer and said barrier layer and modify two-dimension electron gas (2DEG) or two-dimension hole gas (2DHG) of said high electron mobility transistor, wherein said high electron mobility transistor is p-type high electron mobility transistor, and said stress applied by said trench isolation structure is tensile stress, and an area of said active area at said source is larger than an area of said active area at said gate and is larger than an area of said active area at said drain.

A method of fabricating high electron mobility transistor, comprising:

• providing a substrate with active areas;
• forming a buffer layer, a channel layer and a barrier layer sequentially on said substrate, and forming gate, source and drain on said barrier layer;
• forming a trench surrounding said channel layer and said barrier layer;
• and
• forming a trench isolation structure in said trench, wherein said trench isolation structure applies stress on said channel layer and said barrier layer and modify two-dimension electron gas (2DEG) or two-dimension hole gas (2DHG) of said high electron mobility transistor, wherein said high electron mobility transistor is p-type high electron mobility transistor, and said stress applied by said trench isolation structure is compressive stress, and an area of said active area at said source is smaller than an area of said active area at said gate and is smaller than an area of said active area at said drain.