Column IV transistors for PMOS integration

An integrated circuit device, comprising:

• a semiconductor fin comprising at least one of silicon and germanium;
• a gate structure around the semiconductor fin, the gate structure including a gate electrode and a gate dielectric between the semiconductor fin and the gate electrode;
• a source structure or drain structure adjacent the semiconductor fin, the source structure or drain structure including a first portion and a second portion, the first portion comprising at least one of silicon and germanium, and the second portion comprising a p-type dopant and germanium, the second portion having a germanium concentration in excess of 80 atomic %, wherein the first portion is thinner than the second portion, and wherein the first portion is between the second portion and the semiconductor fin;
• and
• a contact structure on the second portion of the source structure or drain structure.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a semiconductor nanowire comprising at least one of silicon and germanium;
• a gate structure around the semiconductor nanowire, the gate structure including a gate electrode and a gate dielectric between the semiconductor nanowire and the gate electrode;
• a source structure or drain structure adjacent the semiconductor nanowire, the source structure or drain structure including a first portion and a second portion, the first portion comprising at least one of silicon and germanium, and the second portion comprising a p-type dopant and germanium, the second portion having a germanium concentration in excess of 80 atomic %, wherein the first portion is thinner than the second portion, and wherein the first portion is between the second portion and the semiconductor nanowire;
• and
• a contact structure on the second portion of the source structure or drain structure.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a semiconductor fin comprising at least one of silicon and germanium;
• a gate structure around the semiconductor fin, the gate structure including a gate electrode and a gate dielectric between the semiconductor fin and the gate electrode;
• a source structure or drain structure adjacent the semiconductor fin, the source structure or drain structure including a first portion and a second portion, the first portion comprising at least one of silicon and germanium, and the second portion comprising a p-type dopant and germanium, the second portion having a germanium concentration in excess of 80 atomic %, wherein the first portion is thinner than the second portion, and wherein the first portion is between the second portion and the semiconductor fin;
• and
• a contact structure on the second portion of the source structure or drain structure.