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US 11,500,010 B2Granted
Integrated circuit with current limit testing circuitry
AssigneeTexas Instruments Incorporated
InventorsWilliam Shane Rowling, Paul R. Clark
Life of this patent
Estimating the term…
Abstract
An integrated circuit with a switched signal path and circuitry configured to determine an anticipated specification current through the signal path.
Claims23
An integrated circuit, comprising:
- a signal path configured to conduct path current;
- a switching device coupled between a first node and a second node along the signal path;
- a comparator having a first input coupled to the first node and a second input coupled to the second node, the comparator configured to receive a reference voltage and to compare to the reference voltage a differential voltage between the first input and the second input;
- disable circuitry configured to open the switching device while a voltage is applied between the first node and the second node and the voltage is ramped until an output of the comparator transitions;
- and
- enable circuitry configured to close the switching device while a device current is applied through the switching device.
3 more elements
A method, comprising:
- operating an integrated circuit during a test mode by creating an open circuit between a first node and a second node that are both along a signal path of the integrated circuit during non-test mode operations;
- with the open circuit, iteratively applying a respectively adjusted differential voltage between the first node and the second node until a responsive state change occurs in response to a corresponding respectively adjusted differential voltage;
- coupling a resistance between the first node and the second node;
- with the resistance between the first node and the second node, applying a current through the resistance and measuring a voltage across the resistance;
- determining in an apparatus a value of the resistance in response to the corresponding respectively adjusted differential voltage and the current;
- and
- determining in the apparatus an anticipated specification current limit for the signal path of the integrated circuit in response to the corresponding respectively adjusted differential voltage and the determined resistance.
4 more elements
A non-transitory computer-readable program storage medium having stored thereon program instructions that when executed by processing logic have the processing logic configured to:
- couple a test signal to an integrated circuit during a test mode to create an open circuit between a first node and a second node that are both along a signal path of the integrated circuit during non-test mode operations;
- with the open circuit, iteratively apply a respectively adjusted differential voltage between the first node and the second node until a responsive state change occurs in response to a corresponding respectively adjusted differential voltage;
- enable a resistance between the first node and the second node;
- with the resistance enabled between the first node and the second node, apply a resistance current through the resistance and measure a voltage across the resistance;
- determine a value of the resistance in response to the corresponding respectively adjusted differential voltage and the resistance current;
- and
- determine an anticipated specification current limit for the signal path of the integrated circuit in response to the corresponding respectively adjusted differential voltage and the determined resistance.
4 more elements
Dependencies are inferred from the claim text.