An active switch, wherein the active switch is manufactured using a manufacturing method of an active switch, the manufacturing method of an active switch comprising:
- providing a substrate, depositing a first metal layer on the substrate, and carrying out patterning treatment on the first metal layer to form a gate electrode;
- depositing a gate insulating layer on the substrate, wherein the gate insulating layer covers the gate electrode;
- sequentially depositing an active layer and a semiconductor composite layer on the gate insulating layer, the semiconductor composite layer comprising a first N-type heavily doped amorphous silicon layer, a first N-type lightly doped amorphous silicon layer, a second N-type heavily doped amorphous silicon layer and a second N-type lightly doped amorphous silicon layer which are sequentially stacked, wherein the ion doping concentration of the first N-type heavily doped amorphous silicon layer is lower than that of the second N-type heavily doped amorphous silicon layer, and the ion doping concentration of the first N-type lightly doped amorphous silicon layer is higher than that of the second N-type lightly doped amorphous silicon layer;
- carrying out photoetching treatment on the active layer and the semiconductor composite layer;
- depositing a second metal layer on the semiconductor composite layer, and carrying out photoetching and wet etching treatment on the second metal layer to obtain a first groove located at the middle of the second metal layer and penetrating through the second metal layer, wherein the second metal layer is partitioned into a source electrode and a drain electrode by the first groove;
- performing dry etching treatment on the active layer and the semiconductor composite layer with the source electrode and the drain electrode as etching barrier layers to obtain a second groove corresponding to the first groove, wherein the second groove penetrates through the semiconductor composite layer and partially penetrates to the active layer, and the first groove and the second groove form a channel region wherein the source electrode and the drain electrode cover the second N-type lightly doped amorphous silicon layer;
- and
- placing the channel region in a preset gas atmosphere for heating treatment;
- the active switch comprising:
- a substrate;
- a gate electrode formed on the substrate;
- a gate insulating layer formed on the substrate, wherein the gate insulating layer covers the gate electrode;
- an active layer formed on the gate insulating layer;
- a semiconductor composite layer formed on the active layer;
- and
- a source electrode and a drain electrode formed on the semiconductor composite layer;
- wherein the gate insulating layer comprises a first sub-gate insulating layer, a second sub-gate insulating layer and a third sub-gate insulating layer which are sequentially stacked, the first sub-gate insulating layer is deposited at a first speed, the second sub-gate insulating layer is deposited at a second speed, the third sub-gate insulating layer is deposited at a third speed, and values of the first speed, the second speed and the third speed are sequentially reduced;
- wherein the semiconductor composite layer comprises a first N-type heavily doped amorphous silicon layer, a first N-type lightly doped amorphous silicon layer, a second N-type heavily doped amorphous silicon layer and a second N-type lightly doped amorphous silicon layer which are sequentially stacked, wherein the ion doping concentration of the first N-type heavily doped amorphous silicon layer is lower than that of the second N-type heavily doped amorphous silicon layer, and the ion doping concentration f the first N-type lightly doped amorphous silicon layer is higher than that of the second N-type lightly doped amorphous silicon layer;
- a channel region is located at the middle of the semiconductor composite layer and the channel region penetrates through the semiconductor composite layer and partially penetrates to the active layer;
- and the source electrode and the drain electrode are respectively located at the two sides of the channel region.