Semiconductor device structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Lun Cheng
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Abstract
Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.
Claims20
A semiconductor structure, comprising:
- a substrate comprising a p-type well and an n-type well;
- a first base portion over the p-type well;
- a second base portion over the n-type well;
- a first plurality of channel members over the first base portion, the first plurality of channel members being stacked one over another;
- a second plurality of channel members over the second base portion, the second plurality of channel members being stacked one over another;
- an isolation feature disposed between the first base portion and the second base portion;
- and
- a deep isolation structure in the substrate disposed below the isolation feature.
A semiconductor structure, comprising:
- a substrate comprising a p-type well and an n-type well;
- a first semiconductor base portion over the p-type well;
- a second semiconductor base portion over the n-type well;
- a first n-type epitaxial feature over the first semiconductor base portion;
- a first p-type epitaxial feature over the second semiconductor base portion;
- a first isolation feature disposed between the first semiconductor base portion and the second semiconductor base portion;
- and
- a deep isolation structure in the substrate disposed directly below the first isolation feature.
A semiconductor structure, comprising:
- a substrate comprising a p-type well and an n-type well;
- a first active region over the p-type well;
- a second active region over the n-type well;
- a first gate structure disposed over the first active region;
- a second gate structure disposed over the second active region;
- a junction isolation feature disposed between the p-type well and the n-type well along a direction;
- and
- a deep isolation feature disposed below and extending from the junction isolation feature, wherein the deep isolation feature is wider than the junction isolation feature along the direction,
- wherein a portion of the first gate structure and a portion of the second gate structure are disposed over a top surface of the junction isolation feature.
Dependencies are inferred from the claim text.