Fixed size soft bit lossy compression in flash memory

A method, comprising:

• reading, with read/write circuitry, a set of hard bits from one or more storage elements;
• sensing, with the read/write circuitry, a set of soft bits while reading the set of hard bits from the one or more storage elements, the set of soft bits having a first fixed size, and each soft bit of the set of soft bits indicating a reliability of a corresponding hard bit of the set of hard bits;
• receiving, with compressed soft bit circuitry, the set of soft bits;
• generating, with the compressed soft bit circuitry and a fixed size soft bit lossy compression algorithm, a fixed size compressed soft bits by compressing the set of soft bits, the fixed size compressed soft bits having a second fixed size that is smaller than the first fixed size;
• and
• outputting, with the compressed soft bit circuitry, the fixed size compressed soft bits to a memory-to-controller bus.

An apparatus, comprising:

• means for reading a set of hard bits from one or more storage elements;
• means for sensing a first set of soft bits while reading the set of hard bits from the one or more storage elements, the first set of soft bits having a first fixed size, and each soft bit of the first set of soft bits indicating a reliability of a corresponding hard bit of the set of hard bits;
• means for generating, with a fixed size soft bit lossy compression algorithm, a fixed size compressed soft bits by compressing the first set of soft bits, the fixed size compressed soft bits having a second fixed size that is smaller than the first fixed size;
• means for decompressing the fixed size compressed soft bits to determine a second set of soft bits;
• and
• means for decoding read data with the second set of soft bits,
• wherein the second set of soft bits is different than the first set of soft bits.