Deskew cell for delay and pulse width adjustment
AssigneeAnalog Devices, Inc.
InventorAndrew Nathan Mort
Life of this patent
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Abstract
A deskew system can be used to adjust signal characteristics such as pulse width and edge timing. In an example, a deskew system can include multiple timing control cells and each cell can operate in one of multiple different modes according to respective mode control signals. The modes can include at least a signal delay mode and a signal pulse width adjustment mode. In an example, a first cell in a deskew system can be configured to receive a test input signal at a first input node and, in response, provide a deskew output signal at a first output node. The deskew output signal can be based on the test input signal, a pulse width adjustment provided by the first cell, and on a delayed signal, corresponding to the input signal, that is provided by a subsequent cell in the series.
Claims20
A deskew system for providing test signals for a device under test, the system comprising:
- multiple timing-control cells coupled in a series, wherein each cell is operable in one of multiple different operating modes according to respective mode control signals, the different modes including a signal delay mode and a signal pulse width adjustment mode, wherein a first cell of the multiple timing-control cells includes:
- a first input node configured to receive a test input signal;
- a reverse input node configured to receive a delayed signal, based on the test input signal, from a subsequent cell in the series;
- a first output node configured to provide a deskew output signal;
- and
- a timing adjustment circuit configured to adjust a pulse width of at least one of the test input signal or the delayed signal to provide the deskew output signal.
A method for adjusting timing of a test signal provided to a device under test using multiple, series-coupled signal timing control cells wherein each of the control cells operates in one of a pulse width adjustment mode or a delay mode, the method comprising:
- at a first cell of the timing-control cells:
- receiving an input test signal at an input node of the first cell;
- receiving a first mode control signal;
- providing a first delayed signal, based on the input test signal, to
- a subsequent cell of the series-coupled timing-control cells;
- receiving a second delayed signal from the subsequent cell;
- and
- providing a pulse width-adjusted output signal based on the second delayed signal, wherein a delay characteristic and a pulse width characteristic of the output signal are based on the first mode control signal.
A system for changing a signal delay or pulse width characteristic of test signals provided to a device under test, the system comprising:
- multiple timing control cells coupled in a series, wherein a first cell of the multiple timing control cells includes a first input node and a first output node, and the first cell is configured to delay and adjust a pulse width of an input signal received at the first input node, and wherein the first cell includes:
- an early signal input node coupled to a forward output node of a preceding cell in the series or to the first input node;
- a late signal input node coupled to a reverse output node of a subsequent cell in the series;
- a summing circuit configured to provide an intermediate signal by combining signals that are modulated based on a delay adjustment instruction and respective data signals at the early and late signal input nodes;
- and
- a pulse width adjustment circuit configured to provide a pulse width-adjusted output signal at the first output node based on a pulse width adjustment instruction and the intermediate signal from the summing circuit.
Dependencies are inferred from the claim text.