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US 11,456,399 B2Granted
Light emitting diode (LED) chip and manufacturing method and light emitting method thereof
AssigneeXiamen Changelight Co., Ltd.
InventorsZhendong Wei, Junxian Li, Qilong Wu, Yingce Liu, Hongyi Zhou
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Abstract
A LED chip includes a substrate, an N-type semiconductor layer, an active region, a P-type semiconductor layer, a transparent electric conductive layer, and a passivation protective layer stacked with each other in sequence. The passivation protective layer has a plurality holes corresponding to different positions of the transparent electric conductive layer respectively. A P-type electrode is electrically linked with the transparent electric conductive layer through said plurality of holes, while an N-type electrode is electrically linked with said N-type semiconductor layer.
Claims4
A manufacturing method of a LED, comprising steps of:
- (a) forming an N-type semiconductor layer, an active region and a P-type semiconductor layer sequentially on a substrate;
- (b) forming said transparent electric conductive layer stacked on said P-type semiconductor layer and forming at least one N-type hole extended from a transparent electric conductive layer to said N-type semiconductor layer through said P-type semiconductor layer and said active region at the same time, wherein the step (b) further comprises steps of:
- stacking a transparent electric conductive base layer on said P-type semiconductor layer;
- stacking a first photoresist layer on said transparent electric conductive base layer;
- and
- etching at least one predetermined position of said first photoresist layer, said transparent electric conductive base layer, and said active region to form said at least one N-type hole and said transparent electric conductive layer simultaneously;
- (c) stacking a passivation protective layer having a plurality of passive-layer holes on said transparent electric conductive layer, such that said passive-layer holes of said passivation protective layer are formed corresponding to different positions of said transparent electric conductive layer respectively, wherein an N-type exposed portion, which is extended from said passivation protective layer to said N-type semiconductor layer through said transparent electric conductive layer, said P-type semiconductor layer and said active region, is formed at a position of said at least one N-type hole, while stacking said passivation protective layer on said transparent electric conductive layer, wherein the step (c) further comprises steps of:
- stacking a passive base layer on said transparent electric conductive layer;
- stacking a second photoresist layer on said passive base layer;
- and
- removing said second photoresist layer and said passive base layer at a position corresponding to said at least one N-type hole, such that said passivation protective layer and said N-type exposed portion are formed simultaneously;
- and
- (d) electrically linking an N-type electrode to said N-type semiconductor layer, and electrically linking a P-type electrode to said P-type semiconductor layer through said plurality of passive-layer holes of said passivation protective layer.
10 more elements
A manufacturing method of a LED, comprising steps of:
- (a) forming an N-type semiconductor layer, an active region and a P-type semiconductor layer sequentially on a substrate;
- (b) forming said transparent electric conductive layer stacked on said P-type semiconductor layer and forming at least one N-type hole extended from a transparent electric conductive layer to said N-type semiconductor layer through said P-type semiconductor layer and said active region at the same time, wherein the step (b) further comprises steps of:
- stacking a transparent electric conductive base layer on said P-type semiconductor layer;
- stacking a first photoresist layer on said transparent electric conductive base layer;
- and
- etching predetermined positions of said first photoresist layer, said transparent electric conductive base layer, said active region, and said N-type semiconductor layer to form said at least one N-type hole and said transparent electric conductive layer simultaneously;
- (c) stacking a passivation protective layer having a plurality of passive-layer holes on said transparent electric conductive layer, such that said passive-layer holes of said passivation protective layer are formed corresponding to different positions of said transparent electric conductive layer respectively, wherein an N-type exposed portion, extending from said passivation protective layer to said N-type semiconductor layer through said transparent electric conductive layer, said P-type semiconductor layer and said active region, is formed in said at least one N-type hole, while stacking said passivation protective layer on said transparent electric conductive layer, wherein the step (c) further comprises steps of:
- stacking a passive base layer on said transparent electric conductive layer;
- stacking a second photoresist layer on said passive base layer;
- and
- removing said second photoresist layer and said passive base layer at a position corresponding to said at least one N-type hole, such that said passivation protective layer and said N-type exposed portion are formed simultaneously;
- and
- (d) electrically linking an N-type electrode to said N-type semiconductor layer, and electrically linking a P-type electrode to said P-type semiconductor layer through said plurality of passive-layer holes of said passivation protective layer.
10 more elements
Dependencies are inferred from the claim text.