Capacitor structure having vertical diffusion plates
AssigneeYangtze Memory Technologies Co., Ltd.
InventorLiang Chen
Life of this patent
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Abstract
A capacitor structure includes a semiconductor substrate, a first vertical diffusion plate in the semiconductor substrate, a first STI structure in the semiconductor substrate and surrounding the first vertical diffusion plate, a second vertical diffusion plate in the semiconductor substrate and surrounding the first STI structure, and an ion well in the semiconductor substrate. The ion well is disposed directly under the first vertical diffusion plate, the first STI structure and the second vertical diffusion plate. The second vertical diffusion plate is electrically coupled to an anode of the capacitor structure. The first vertical diffusion plate is electrically coupled to a cathode of the capacitor structure.
Claims20
A device, comprising:
- a semiconductor substrate of a first conductivity type;
- a first doped plate of the first conductivity type in the semiconductor substrate;
- a first doped region of the first conductivity type at a surface of the first doped plate, a doping concentration of the first doped region being higher than a doping concentration of the first doped plate;
- a first shallow trench isolation (STI) structure in the semiconductor substrate, the first STI structure surrounding the first doped plate;
- a second doped plate of the first conductivity type in the semiconductor substrate, the second doped plate surrounding the first STI structure;
- and
- a second doped region of the first conductivity type at a surface of the second doped plate, a doping concentration of the second doped region being higher than a doping concentration of the second doped plate;
- wherein the first doped plate, the second doped plate, and the first STI structure form a capacitor.
A system, comprising:
- a memory device;
- and
- a circuit coupled to the memory device and comprising a capacitor, wherein the capacitor comprises:
- a first doped plate in a semiconductor substrate;
- a first doped region of a first conductivity type at a surface of the first doped plate, a doping concentration of the first doped region being higher than a doping concentration of the first doped plate;
- a first shallow trench isolation (STI) structure in the semiconductor substrate, the first STI structure surrounding the first doped plate;
- a second doped plate in the semiconductor substrate, the second doped plate surrounding the first STI structure;
- and
- a second doped region of the first conductivity type at a surface of the second doped plate, a doping concentration of the second doped region being higher than a doping concentration of the second doped plate.
A method for operating a system, the system comprising a memory device and a circuit coupled to the memory device and comprising a capacitor, the capacitor comprising a first doped plate in a semiconductor substrate, a first doped region of a first conductivity type at a surface of the first doped plate, a doping concentration of the first doped region being higher than a doping concentration of the first doped plate, a first shallow trench isolation (STI) structure in the semiconductor substrate, the first STI structure surrounding the first doped plate, a second doped plate in the semiconductor substrate, the second doped plate surrounding the first STI structure, a second doped region of the first conductivity type at a surface of the second doped plate, a doping concentration of the second doped region being higher than a doping concentration of the second doped plate, the method comprising:
- receiving a first voltage at the first doped plate of the capacitor to boost a second voltage at the second doped plate of the capacitor;
- and
- applying the boosted second voltage to the memory device.
Dependencies are inferred from the claim text.