Normally-off gallium oxide field-effect transistor structure and preparation method therefor

A preparation method for a normally-off gallium oxide field-effect transistor structure, wherein the preparation method comprises:

• providing a substrate layer;
• forming a n-type doped gallium oxide channel layer on the substrate layer;
• depositing a mask layer on the n-type doped gallium oxide channel layer, the mask layer being a metal or an insulating medium;
• removing the mask layer on a portion of the n-type doped gallium oxide channel layer by utilizing a photoetching, developing, dry etching or wet etching method, whereby obtaining a remaining mask layer on the n-type doped gallium oxide channel layer and exposing the portion of the n-type doped gallium oxide channel layer;
• performing a high-temperature annealing in an oxygen atmosphere to form an annealed region within the portion of the n-type doped gallium oxide channel layer;
• removing the remaining mask layer after performing the high-temperature annealing;
• forming a gate on the annealed region;
• and
• forming a source and a drain on the n-type doped gallium oxide channel layer, the gate being located between the source and the drain.