Thin film transistor, manufacturing method thereof, array substrate and electronic device
AssigneesOrdos Yuansheng Optoelectronics Co., Ltd., Beijing BOE Technology Development Co., Ltd.
InventorsNini Bai, Liangliang Liu, Liang Tang
Life of this patent
Estimating the term…
Abstract
A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device are disclosed. The manufacturing method of the thin film transistor includes: forming an active layer pattern on a base substrate; forming a gate insulating layer on the active layer pattern; the gate insulating layer includes a first portion, a second portion and a third portion, the third portion is on both sides of the first portion, the second portion is between the first portion and the third portion on at least one side, and the thickness of the second portion is larger than that of the third portion.
Claims20
A method of manufacturing a thin film transistor, comprising:
- forming an active layer pattern on a base substrate;
- forming a gate insulating layer on the active layer pattern, the gate insulating layer comprising a first portion, a second portion, and a third portion, the third portion being on both sides of the first portion, the second portion being between the first portion and the third portion on at least one side, and a thickness of the second portion being greater than a thickness of the third portion;
- forming a gate electrode located at a side of the gate insulating layer far from the base substrate;
- and
- performing an ion doping process on the active layer pattern using the gate electrode as a mask under a same ion doping condition,
- wherein orthographic projections of the first portion, the second portion, and the third portion on the base substrate coincide with an orthographic projection of the active layer pattern on the base substrate;
- an orthographic projection of the first portion coincides with an orthographic projection of the gate electrode on the base substrate;
- wherein a slope angle of the second portion immediately adjacent to a side edge of the gate electrode is substantially equal to a slope angle of the side edge of the gate electrode.
A thin film transistor comprising:
- a base substrate;
- an active layer structure located on the base substrate;
- a gate insulating layer on the active layer structure, the gate insulating layer comprising a first portion, a second portion, and a third portion, the third portion being on both sides of the first portion, the second portion being between the first portion and the third portion on at least one side, and a thickness of the second portion being greater than a thickness of the third portion;
- and
- a gate electrode, wherein the gate electrode is located on a side of the gate insulating layer far from the base substrate, and an orthographic projection of the gate electrode coincides with an orthographic projection of the first portion on the base substrate,
- wherein a slope angle of the second portion immediately adjacent to a side edge of the gate electrode is substantially equal to a slope angle of the side edge of the gate electrode.
A method of manufacturing a thin film transistor, comprising:
- forming an active layer pattern on a base substrate;
- forming a gate insulating layer on the active layer pattern, the gate insulating layer comprising a first portion, a second portion, and a third portion, the third portion being on both sides of the first portion, the second portion being between the first portion and the third portion on at least one side, and a thickness of the second portion being greater than a thickness of the third portion;
- forming a gate electrode located at a side of the gate insulating layer far from the base substrate;
- and
- performing an ion doping process on the active layer pattern using the gate electrode as a mask under a same ion doping condition,
- wherein orthographic projections of the first portion, the second portion, and the third portion on the base substrate coincide with an orthographic projection of the active layer pattern on the base substrate;
- an orthographic projection of the first portion coincides with an orthographic projection of the gate electrode on the base substrate;
- wherein the ion doping process is performed by controlling an ion implantation dose and an ion implantation depth so that a peak position of the ion implantation dose does not exceed a region of the active layer pattern overlapping the third portion,
- wherein a slope angle of the second portion immediately adjacent to a side edge of the gate electrode is substantially equal to a slope angle of the side edge of the gate electrode.
Dependencies are inferred from the claim text.