Semiconductor device structure with hard mask layer over fin structure and method for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Chiang, Kuan-Ting Pan, Huan-Chieh Su, Shi-Ning Ju, Chih-Hao Wang
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Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a substrate, and a hard mask layer formed over the fin structure. The semiconductor device structure also includes a gate structure formed surrounding the hard mask layer and the fin structure, and a portion of the gate structure is interposed between the fin structure and the hard mask layer. The semiconductor device structure further includes a source/drain (S/D) structure formed adjacent to the gate structure.
Claims20
A semiconductor device structure, comprising:
- a fin structure formed over a substrate;
- a hard mask layer formed over the fin structure;
- a gate structure formed surrounding the hard mask layer and the fin structure, and a portion of the gate structure is interposed between the fin structure and the hard mask layer;
- a source/drain (S/D) structure formed adjacent to the gate structure;
- and
- an inner spacer formed between the gate structure and the S/D structure, wherein the inner spacer is formed along a sidewall of the portion of the gate structure.
A semiconductor device structure, comprising:
- a plurality of channel structures stacked along a first direction over a substrate;
- a gate structure formed over the channel structures, wherein a first portion of the gate structure extends between the plurality of channel structures;
- a source/drain (S/D) structure formed adjacent to the gate structure;
- a dummy channel layer formed over the channel structures along the first direction, wherein the channel structures is separated from the dummy channel layer by a second portion of the gate structure;
- wherein the dummy channel layer is a hard mask layer comprising a dielectric material, and
- a contact etch stop layer (CESL) formed adjacent to and in direct contact with the dummy channel layer.
A semiconductor device structure, comprising:
- a fin structure formed over a substrate, wherein the fin structure comprises a plurality of nanowires;
- a hard mask layer formed over a topmost nanowires of the fin structure;
- a gate structure surrounding the nanowires and the hard mask layer;
- and
- a gate spacer layer formed adjacent to the gate structure, wherein the gate spacer layer is formed on and in direct contact with the hard mask layer, wherein a height of a first portion of the hard mask layer directly blow the gate spacer layer is greater than a height of a second portion of the hard mask layer directly below the gate structure.
Dependencies are inferred from the claim text.