Self-aligned gate edge architecture with alternate channel material

An integrated circuit structure, comprising:

• a first set of one or more fins including a first fin, the first fin comprising a first semiconductor material;
• a first gate structure over the first set of fins and in contact with the first semiconductor material, the first gate structure having opposing first and second sides;
• a second set of one or more fins including a second fin, the second fin comprising a second semiconductor material;
• a second gate structure over the second set of fins and in contact with the second semiconductor material, the second gate structure having opposing first and second sides;
• a substrate below the fins, the substrate comprising a third semiconductor material compositionally different from the first semiconductor material, wherein the first fin is on a fin stub, the fin stub comprising the third semiconductor material;
• and
• an isolation wall laterally adjacent to the second side of the first gate structure and the first side of the second gate structure, the isolation wall having a first sidewall that is a first distance from a right sidewall of a rightmost fin of the first set of fins, the isolation wall having a second sidewall that is a second distance from a left sidewall of a leftmost fin of the second set of fins;
• wherein the difference between the first and second distances is 2 nm or less, and the first and second distances being measured in the same horizontal plane.